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74VHC02D Datenblatt(PDF) 7 Page - NXP Semiconductors |
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74VHC02D Datenblatt(HTML) 7 Page - NXP Semiconductors |
7 / 14 page 74VHC_VHCT02_1 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 01 — 13 August 2009 7 of 14 NXP Semiconductors 74VHC02; 74VHCT02 Quad 2-input NOR gate [1] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). [2] tpd is the same as tPLH and tPHL. [3] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of the outputs. 11. Waveforms 74VHCT02; VCC = 4.5 V to 5.5 V tpd propagation delay nA, nB to nY; see Figure 6 [2] CL = 15 pF - 3.8 5.5 1.0 6.5 1.0 7.0 ns CL = 50 pF - 5.1 7.5 1.0 8.5 1.0 9.5 ns CPD power dissipation capacitance CL = 50 pF; fi = 1 MHz; VI = GND to VCC [3] - 8.0 - - - - - pF Table 7. Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 7. Symbol Parameter Conditions 25 °C −40 °C to +85 °C −40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig 6. Input to output propagation delays 001aah085 tPHL tPLH VM VM nY output nA, nB input VI GND VOH VOL Table 8. Measurement points Type Input Output VM VM 74VHC02 0.5VCC 0.5VCC 74VHCT02 1.5 V 0.5VCC |
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