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74LV4066_2005 Datenblatt(PDF) 11 Page - NXP Semiconductors |
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74LV4066_2005 Datenblatt(HTML) 11 Page - NXP Semiconductors |
11 / 23 page 9397 750 15209 © Koninklijke Philips Electronics N.V. 2005. All rights reserved. Product data sheet Rev. 03 — 4 July 2005 11 of 23 Philips Semiconductors 74LV4066 Quad bilateral switches [1] Typical values are measured at nominal VCC and Tamb = 25 °C. [2] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ[(CL +CS) × VCC2 × fo] where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; CS = maximum switch capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ[(C L +CS) × VCC 2 × f o] = sum of the outputs. [3] The condition is VI = GND to VCC. tPHZ, tPLZ turn-off time nE to Vos see Figure 9 VCC = 2.0 V - - 81 ns VCC = 2.7 V to 3.6 V - - 47 ns VCC = 4.5 V - - 40 ns VCC = 6.0 V - - 34 ns Table 9: Dynamic characteristics …continued Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 11. Symbol Parameter Conditions Min Typ Max Unit |
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