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AD5542A Datenblatt(PDF) 4 Page - Analog Devices

Teilenummer AD5542A
Bauteilbeschribung  System Ready, 20-Bit, 짹2LSB INL
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD5542A Datenblatt(HTML) 4 Page - Analog Devices

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AD5790
Data Sheet
Rev. B | Page 4 of 28
B Version1
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
Output Enabled Glitch Impulse
57
nV-sec
On removal of output ground clamp
Digital Feedthrough
0.27
nV-sec
DC Output Impedance (Normal Mode)
3.4
DC Output Impedance (Output
Clamped to Ground)
6
REFERENCE INPUTS
VREFP Input Range
5
VDD − 2.5
V
VREFN Input Range
VSS + 2.5
0
V
Input Bias Current
−20
−0.63
+20
nA
−4
−0.63
+4
TA = 0°C to 105°C
Input Capacitance
1
pF
VREFP, VREFN
LOGIC INPUTS
Input Current5
−1
+1
μA
Input Low Voltage, VIL
0.3 × IOVCC
V
IOVCC = 1.71 V to 5.5 V
Input High Voltage, VIH
0.7 × IOVCC
V
IOVCC = 1.71 V to 5.5 V
Pin Capacitance
5
pF
LOGIC OUTPUT (SDO)
Output Low Voltage, VOL
0.4
V
IOVCC = 1.71 V to 5.5 V, sinking 1 mA
Output High Voltage, VOH
IOVCC − 0.5
V
IOVCC = 1.71 V to 5.5 V, sourcing 1 mA
High Impedance Leakage Current
±1
μA
High Impedance Output Capacitance
3
pF
POWER REQUIREMENTS
All digital inputs at DGND or IOVCC
VDD
7.5
VSS + 33
V
VSS
VDD − 33
−2.5
V
VCC
2.7
5.5
V
IOVCC
1.71
5.5
V
IOVCC ≤ VCC
IDD
10.3
14
mA
ISS
−10
−14
mA
ICC
600
900
μA
IOICC
52
140
μA
SDO disabled
DC Power Supply Rejection Ratio
±7.5
μV/V
∆VDD ± 10%, VSS = −15 V
±1.5
μV/V
∆VSS ± 10%, VDD = 15 V
AC Power Supply Rejection Ratio
90
dB
∆VDD ± 200 mV, 50 Hz/60 Hz, VSS = −15 V
90
dB
∆VSS ± 200 mV, 50 Hz/60 Hz, VDD = 15 V
1 Temperature range: −40°C to +125°C, typical conditions: TA = +25°C, VDD = +15 V, VSS = −15 V, VREFP = +10 V, VREFN = −10 V.
2 Performance characterized with the AD8675ARZ output buffer.
3 Linearity error refers to both INL error and DNL error, either parameter can be expected to drift by the amount specified after the length of time specified.
4 The AD5790 is configured in unity-gain mode with a low-pass RC filter on the output. R = 300 Ω, C = 143 pF (total capacitance seen by the output buffer, lead
capacitance, and so forth).
5 Current flowing in an individual logic pin.


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