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ADE7880ACPZ Datenblatt(PDF) 4 Page - Analog Devices

Teilenummer ADE7880ACPZ
Bauteilbeschribung  Polyphase Multifunction Energy Metering IC
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ADE7880ACPZ Datenblatt(HTML) 4 Page - Analog Devices

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ADE7880
Data Sheet
Rev. A | Page 4 of 104
SPECIFICATIONS
VDD = 3.3 V ± 10%, AGND = DGND = 0 V, on-chip reference, CLKIN = 16.384 MHz, TMIN to TMAX = −40°C to +85°C.
Table 1.
Parameter1, 2
Min
Typ
Max
Unit
Test Conditions/Comments
ACTIVE ENERGY MEASUREMENT
Active Energy Measurement Error
(per Phase)
Total Active Energy
0.1
%
Over a dynamic range of 1000 to 1,
PGA = 1, 2, 4; integrator off, pf = 1, gain
compensation only
0.2
%
Over a dynamic range of 5000 to 1,
PGA = 1, 2, 4; integrator off, pf = 1
0.1
%
Over a dynamic range of 500 to 1,
PGA = 8, 16; integrator on, pf = 1, gain
compensation only
0.2
%
Over a dynamic range of 2000 to 1,
PGA = 8, 16; integrator on, pf = 1
Fundamental Active Energy
0.1
%
Over a dynamic range of 1000 to 1,
PGA = 1, 2, 4; integrator off, pf = 1, gain
compensation only
0.2
%
Over a dynamic range of 5000 to 1,
PGA = 1, 2, 4; integrator off, pf = 1
0.1
%
Over a dynamic range of 500 to 1,
PGA = 8, 16; integrator on, pf = 1, gain
compensation only
0.2
%
Over a dynamic range of 2000 to 1,
PGA = 8, 16; integrator on, pf = 1
Phase Error Between Channels
Line frequency = 45 Hz to 65 Hz, HPF on
Power Factor (PF) = 0.8 Capacitive
±0.05
Degrees
Phase lead 37°
PF = 0.5 Inductive
±0.05
Degrees
Phase lag 60°
AC Power Supply Rejection
VDD = 3.3 V + 120 mV rms/120 Hz,
IPx = VPx = ±100 mV rms
Output Frequency Variation
0.01
%
DC Power Supply Rejection
VDD = 3.3 V ± 330 mV dc
Output Frequency Variation
0.01
%
Total Active Energy Measurement
Bandwidth (−3 dB)
3.3
kHz
REACTIVE ENERGY MEASUREMENT
Reactive Energy Measurement Error
(per Phase)
Fundamental Reactive Energy
0.1
%
Over a dynamic range of 1000 to 1,
PGA = 1, 2, 4; integrator off, pf = 0, gain
compensation only
0.2
%
Over a dynamic range of 5000 to 1,
PGA = 1, 2, 4; integrator off, pf = 0
0.1
%
Over a dynamic range of 500 to 1,
PGA = 8, 16; integrator on, pf = 0, gain
compensation only
0.2
%
Over a dynamic range of 2000 to 1,
PGA = 8, 16; integrator on, pf = 0
Phase Error Between Channels
Line frequency = 45 Hz to 65 Hz, HPF on
PF = 0.8 Capacitive
±0.05
Degrees
Phase lead 37°
PF = 0.5 Inductive
±0.05
Degrees
Phase lag 60°
AC Power Supply Rejection
VDD = 3.3 V + 120 mV rms/120 Hz,
IPx = VPx = ± 100 mV rms
Output Frequency Variation
0.01
%
DC Power Supply Rejection
VDD = 3.3 V ± 330 mV dc


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