Datenblatt-Suchmaschine für elektronische Bauteile |
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DM9006EP Datenblatt(PDF) 5 Page - Davicom Semiconductor, Inc. |
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DM9006EP Datenblatt(HTML) 5 Page - Davicom Semiconductor, Inc. |
5 / 76 page DM9006 2-port Switch with Processor Interface Preliminary datasheet 5 DM9006-13-DS-P01 September 1, 2009 6.46 Snooping Control Register 1 (78H)............................................................................................................ 31 6.47 Snooping Control Register 2 (79H)............................................................................................................ 31 6.48 Snooping Control Register 3 (7AH) ........................................................................................................... 32 6.49 Snooping Control Register 4 (7BH) ........................................................................................................... 32 6.50 Snooping Control Register 5 (7CH) ........................................................................................................... 32 6.51 MIB Counter Port Index Register (80H) ..................................................................................................... 32 6.52 MIB Counter Data Registers (81H~84H) .................................................................................................... 33 6.53 Port-Based VLAN Mapping Table Registers (B0H~BFH)......................................................................... 34 6.54 TOS Priority Map Registers (C0H~CFH).................................................................................................... 34 6.55 VLAN Priority Map Registers (D0H~D1H) ................................................................................................. 37 6.56 Memory Data Pre-Fetch Read Command without Address Increment Register (F0H) ........................ 37 6.57 Memory Data Read Command with Address Increment Register (F2H)................................................ 37 6.58 Memory Data Read Address Register (F4H) ............................................................................................. 37 6.59 Memory Data Read Address Register (F5H) ............................................................................................. 37 6.60 Memory Data Write Command without Address Increment Register (F6H).......................................... 37 6.61 Memory Data Write Command with Address Increment Register (F8H) ............................................... 38 6.62 Memory Data Write Address Register (FAH) ............................................................................................ 38 6.63 Memory Data Write Address Register (FBH) ............................................................................................ 38 6.64 TX Packet Length Registers (FCH~FDH) .................................................................................................. 38 6.65 Interrupt Status Register (FEH).................................................................................................................. 38 |
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