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SL4043BN Datenblatt(PDF) 1 Page - System Logic Semiconductor

Teilenummer SL4043BN
Bauteilbeschribung  Quad 3-State R/S Latch
Download  6 Pages
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Hersteller  SLS [System Logic Semiconductor]
Direct Link  http://www.slsemicon.co.kr/e_index.htm
Logo SLS - System Logic Semiconductor

SL4043BN Datenblatt(HTML) 1 Page - System Logic Semiconductor

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SL4043B
System Logic
Semiconductor
SLS
Quad 3-State R/S Latch
High-Voltage Silicon-Gate CMOS
The SL4043B types are quad cross-coupled 3-state CMOS NOR
latces. Each latch has a separate Q output and individual SET and
RESET inputs. The Q outputs are controlled by a common ENABLE
input. A logic “1” or high on the ENABLE input connects the latch
states to the Q outputs. A logic “0” or low on the ENABLE input
disconnects the latch states from the Q outputs, resulting in an open
circuit condition on the Q outputs. The open circuit feature allows
common busing of the outputs.
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full package-
temperature range; 100 nA at 18 V and 25
°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL4043BN Plastic
SL4043BD SOIC
TA = -55
° to 125° C for all packages
PIN ASSIGNMENT
FUNCTION TABLE
Inputs
Outputs
S
R
OE
Q
X
X
L
High
Impedance
L
L
H
No change
L
H
H
L
H
L
H
H
H
H
H
H
X = don’t care
LOGIC DIAGRAM
PIN 13 = NO CONNECTION
PIN 16=VCC
PIN 8= GND


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