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74AC11280D Datenblatt(PDF) 1 Page - Texas Instruments |
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74AC11280D Datenblatt(HTML) 1 Page - Texas Instruments |
1 / 5 page 74AC11280 9BIT PARITY GENERATOR/CHECKER SCAS055A − D3201, APRIL 1989 − REVISED APRIL 1993 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77001 Copyright 1993, Texas Instruments Incorporated 2−1 • Generates Either Odd or Even Parity for Nine Data Lines • Cascadable for n-Bits Parity • Flow-Through Architecture to Optimize PCB Layout • Center-Pin V CC and GND Configurations to Minimize High-Speed Switching Noise • EPICt (Enhanced-Performance Implanted CMOS) 1- mm Process • 500-mA Typical Latch-Up Immunity at 125 °C • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs description This universal, monolithic, nine-bit parity generator/checker features odd and even outputs to facilitate operation of either odd or even parity application. The word-length capability is easily expanded by cascading. The 74AC11280 is characterized for operation from − 40 °C to 85°C. FUNCTION TABLE NUMBER OF INPUTS A OUTPUTS NUMBER OF INPUTS A THRU I THAT ARE HIGH S EVEN S ODD 0, 2, 4, 6, 8 H L 1, 3, 5, 7, 9 L H 1 2 3 4 5 6 7 14 13 12 11 10 9 8 B A Σ ODD GND Σ EVEN NC I C D E VCC F G H D OR N PACKAGE (TOP VIEW) 2k I H G F E D C B A 7 8 9 10 12 13 14 1 2 Σ ODD Σ EVEN 3 5 logic symbol† † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. EPIC is a trademark of Texas Instruments Incorporated. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
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