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SL74HC573D Datenblatt(PDF) 1 Page - System Logic Semiconductor |
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1 / 5 page SL74HC573 System Logic Semiconductor SLS Octal 3-State Noninverting Transparent Latch High-Performance Silicon-Gate CMOS The SL74HC573 is identical in pinout to the LS/ALS573. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LS/ALSTTL outputs. These latches appear transparent to data (i.e., the outputs change asynchronously) when Latch Enable is high. When Latch Enable goes low, data meeting the setup and hold time becomes latched. • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 2.0 to 6.0 V • Low Input Current: 1.0 µA • High Noise Immunity Characteristic of CMOS Devices ORDERING INFORMATION SL74HC573N Plastic SL74HC573D SOIC TA = -55 ° to 125° C for all packages FUNCTION TABLE Inputs Output Output Enable Latch Enable D Q L H H H L H L L L L X no change H X X Z X = don’t care Z = high impedance LOGIC DIAGRAM PIN 20=VCC PIN 10 = GND PIN ASSIGNMENT |
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