Datenblatt-Suchmaschine für elektronische Bauteile |
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ADS8555SPMR Datenblatt(PDF) 11 Page - Texas Instruments |
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ADS8555SPMR Datenblatt(HTML) 11 Page - Texas Instruments |
11 / 36 page CONVST_A CONVST_B CONVST_C BUSY (C20=C21=0) CS DB[15:0] t D1 t 2 t 1 RD t 4 CH A0 CH A1 CH B0 CH B1 CH C0 CH C1 t 5 t D5 t 6 t H3 t 7 t ACQ t 3 t CONV ADS8555 www.ti.com SBAS531B – DECEMBER 2010 – REVISED FEBRUARY 2011 Figure 2. Parallel Read Access Timing Diagram PARALLEL INTERFACE TIMING REQUIREMENTS (Read Access) (1) Over recommended operating free-air temperature range at –40°C to +125°C, AVDD = 5V, and BVDD = 2.7V to 5.5V, unless otherwise noted. ADS8555 PARAMETER MIN MAX UNIT tACQ Acquisition time 280 ns tCONV Conversion time 1.26 µs t1 CONVST_x low time 20 ns t2 BUSY low to CS low time 0 ns t3 Bus access finished to next conversion start time(2) 40 ns t4 CS low to RD low time 0 ns t5 RD high to CS high time 0 ns t6 RD pulse width 30 ns t7 Minimum time between two read accesses 10 ns tD1 CONVST_x high to BUSY high delay 5 20 ns tD5 RD falling edge to output data valid delay 20 ns tH3 Output data to RD rising edge hold time 5 ns (1) All input signals are specified with tR = tF = 1.5ns (10% to 90% of BVDD) and timed from a voltage level of (VIL + VIH)/2. (2) Refer to CS signal or RD, whichever occurs first. © 2010–2011, Texas Instruments Incorporated 11 Product Folder Link(s): ADS8555 |
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