TPIC5203

2CHANNEL INDEPENDENT GATEPROTECTED

POWER DMOS ARRAY

SLIS040 − SEPTEMBER 1994

2−4

POST OFFICE BOX 655303

POST OFFICE BOX 1443

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

td(on)

Turn-on delay time

25

50

td(off)

Turn-off delay time

VDD = 25 V,

RL = 30 Ω,

ten = 10 ns,

27

50

ns

tr

Rise time

VDD = 25 V,

tdis = 10 ns,

RL = 30 Ω,

See Figure 2

ten = 10 ns,

15

30

ns

tf

Fall time

tdis = 10 ns,

See Figure 2

7

15

Qg

Total gate charge

VDS = 48 V,

ID = 0.8 A,

VGS = 10 V,

4.7

5.9

Qgs(th) Threshold gate-to-source charge

VDS = 48 V,

See Figure 3

ID = 0.8 A,

VGS = 10 V,

0.5

0.6

nC

Qgd

Gate-to-drain charge

See Figure 3

1.9

2.4

nC

LD

Internal drain inductance

5

nH

LS

Internal source inductance

5

nH

Rg

Internal gate resistance

0.25

Ω

thermal resistance

PARAMETER

TEST CONDITIONS

MIN

TYP

MAX

UNIT

RθJA

Junction-to-ambient thermal resistance

See Notes 4 and 7

130

RθJB

Junction-to-board thermal resistance

See Notes 5 and 7

79

°C/W

RθJP

Junction-to-pin thermal resistance

See Notes 6 and 7

34

C/W

NOTES:

4. Package mounted on an FR4 printed-circuit board with no heatsink

5. Package mounted on a 24 inch2, 4-layer FR4 printed-circuit board

6. Package mounted in intimate contact with infinite heatsink

7. All outputs with equal power

PARAMETER MEASUREMENT INFORMATION

VDS = 48 V

VGS = 0

TJ = 25°C

Z1 and Z2‡

trr(SD)

0

− 0.5

− 1

− 1.5

− 2

− 2.5

1.5

1

0.5

25% of IRM†

Shaded Area = QRR

Reverse di/dt = 100 A/

µs

IRM†

Time − ns

0

50

100

150

200

250

300

350

400

450

500

† IRM = maximum recovery current

‡ The above waveform is representative of D1 and D2 in shape only.

Figure 1. Reverse-Recovery-Current Waveform of Source-to-Drain Diode