74AUP1G95 datasheet(2/10 Pages) FAIRCHILD

Teilenummer	74AUP1G95

Bauteilbeschribung	TinyLogic짰 Low Power Universal Configurable Two-Input Logic Gate (Open Drain Output)

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Hersteller	FAIRCHILD [Fairchild Semiconductor]

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74AUP1G95 • Rev. 1.0.1

2

Pin Configuration

1

B

2

GND

3

6

5

4

A

C

VCC

Y

Figure 1.

MicroPak™ (Top Through View)

Pin Definitions

Pin #

Name

Description

1

B

Data Input

2

GND

Ground

3

A

Data Input

4

Y

Output (Open Drain)

5

VCC

Supply Voltage

6

C

Data Input

Function Table

Inputs

Y=Output

C

B

A

L

H

L

H

L

H

(1

L

H

(1)

H

L

H

L

H

(1)

H

L

H

(1)

H = HIGH Logic Level

L = LOW Logic Level

Note:

1.

High impedance output state, open drain.

Function Selection Table

2-Input Logic Function

Connection Configuration

2-to-1 MUX

Figure 2

2-Input AND Gate

Figure 3

2-Input OR Gate with One Inverted Input

Figure 4

2-Input NAND Gate with One Inverted Input

Figure 4

2-Input AND Gate with One Inverted Input

Figure 5

2-Input NOR Gate with One Inverted Input

Figure 5

2-Input OR Gate

Figure 6

Inverted

Figure 7

Buffer

Figure 8

Ähnliche Beschreibung - 74AUP1G95

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ON Semiconductor	74AUP1G95	485Kb / 12P	Low Power Universal Configurable Two-Input Logic Gate Sep 2012 Rev. 1.0.1

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