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AD1377 Datenblatt(PDF) 5 Page - Analog Devices |
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AD1377 Datenblatt(HTML) 5 Page - Analog Devices |
5 / 8 page AD1376/AD1377 –5– REV. B Serial data coding is complementary binary for unipolar input ranges and complementary offset binary for bipolar input ranges. Serial output is by bit (1M4SB first, LSB last) in NRZ (nonreturn-to-zero) format. Serial and parallel data outputs change state on positive-going clock edges. Serial data is guaran- teed valid 120 ns after the rising clock edges, permitting serial data to he clocked directly into a receiving register on the negative-going clock edges as shown in Figure 9. There are 17 negative-going clock edges in the complete 16-bit conversion cycle. The first negative edge shifts an invalid bit into the regis- ter, which is shifted out on the last negative-going clock edge. All serial data bits will have been correctly transferred and be in the receiving shift register locations shown at the completion of the conversion period. Figure 9. Clock High to Serial Out Valid Short Cycle Input A Short Cycle Input, Pin 32, permits the timing cycle shown in Figure 7 to be terminated after any number of desired bits has been converted, permitting somewhat shorter conversion times in applications not requiring full 16-bit resolution. When 10-bit resolution is desired, Pin 32 is connected to Bit 11 output Pin 11. The conversion cycle then terminates and the STATUS flag resets after the Bit 10 decision (timing diagram of Figure 7). Short cycle connections and associated 8-, 10-, 12-, 13-, 14- and 15-bit conversion times are summarized in Table I, for a 1.6 MHz clock (AD1377) or 933 kHz (AD1376). INPUT SCALING The ADC (ADC) inputs should he scaled as close to the maxi- mum input signal range as possible in order to utilize the maxi- mum signal resolution of the A/D converter. Connect the input signal as shown in Table II. See Figure 10 for circuit details. Table II. Input Scaling Connections Input Connect Connect Connect Signal Output Pin 26 Pin 24 Input Line Code to Pin to Signal to ±10 V COB 27 Input 24 Signal ±5 V COB 27 Open 25 ±2.5 V COB 27 Pin 27 25 0 V to +5 V CSB 22 Pin 27 25 0 V to +10 V CSB 22 Open 25 0 V to +20 V CSB 22 Input 24 Signal Note Pin 27 is extremely sensitive to noise and should be guarded by Analog Common. Figure 10. Input Scaling Circuit Table I. Short Cycle Connections Maximum Maximum Conversion Conversion Connect Short Resolution Time– s Time– s Status Flag Cycle Pin 32 to Bits (% FSR) (AD1377) (AD1378) Reset Pin: 16 0.0015 10 17.1 t16 NC (Open) 15 0.003 9.4 16.1 t15 16 14 0.006 8.7 15.0 t14 15 13 0.012 8.1 13.9 t13 14 12 0.024 7.5 12.9 t12 13 10 0.100 6.3 10.7 t10 11 8 0.390 5.0 8.6 t8 9 |
Ähnliche Teilenummer - AD1377 |
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Ähnliche Beschreibung - AD1377 |
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