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AD1385TD Datenblatt(PDF) 8 Page - Analog Devices |
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AD1385TD Datenblatt(HTML) 8 Page - Analog Devices |
8 / 20 page AD1385 REV. 0 –8– CONNECTION AND OPERATION OF THE AD1385 Analog Input The analog input should be connected to the Track/Hold Input (Pin 25). Two pin programmable operating ranges are available: ±5 V and ±10 V. Connect the Track/Hold Output to V IN A and/ or VIN B as follows: Desired Scale Connect VIN A to Connect VIN B to ±5 V Track/Hold Output Track/Hold Output ±10 V Track/Hold Output Analog Signal GND Harmonic distortion is lower when using the ±5 V range, while noise is lower when using the ±10 V range. The AD1385’s noise and distortion performance exceed the capability of most signal sources. Maintaining this performance at the system level requires attention to every detail of ground- ing, bypassing, and signal sources. A low impedance high band- width signal source is essential to achieve low distortion. Few monolithic amplifiers exist which can maintain signal fidelity at levels comparable with the AD1385’s performance, even at low frequencies. High bandwidth means increased noise and de- creased SNR. See Testing the AD1385 for techniques of achiev- ing the lowest possible noise and distortion. Grounding Proper treatment of the AD1385’s power and ground connec- tions is vital to achieve the best possible system performance. The ideal grounding arrangement is to have a single, solid, low impedance ground plane beneath the device to which all ground and supply bypassing connections are made. This results in the lowest possible ground noise and minimizes undesired interac- tions between the sensitive circuits inside the AD1385. Aperture uncertainty, for example, can be degraded by noise in Power Ground because the Hold Command signals are referenced to this ground. The digital interface between the AD1385 and the rest of the user’s system is also critical. The following discussion will help in obtaining optimal performance. These guidelines are general and apply equally well to other high performance analog and digital circuits. The AD1385 must connect to three other parts of the system: the input signal(s), the power supplies, and the digital interface. The system designer must determine the magnitude and type of ground currents and whether they are constant or dynamic. A system block diagram is a valuable aid to understanding how grounds should be connected for good performance. Figure 14 shows recommended ground connections for the AD1385 in a typical system. Figure 14. AD1385 Grounding The AD1385 has a net ground current of about 40 mA. Most of this flows in the power grounds. There are also substantial dy- namic currents in the power grounds. The signal grounds have primarily low level static (dc) currents. Signal and power grounds are separated inside the hybrid because the resistance and inductance inherent in thick-film construction would cause interactions between ground currents, leading to poor perfor- mance. (Remember that an LSB can be as small as 156 µV.) Care must be taken to prevent the AD1385’s ground currents from flowing in the signal ground between the signal source and the AD1385 if this ground has significant resistance. This is not usually a problem if the signal source is located on the same board as the AD1385 because the resistance can be made very low through the use of a ground plane. The signal source’s ground and supply currents must be consid- ered when the source and ADC share common power supplies. A ground loop formed by the AD1385, the signal source, and the power supplies can cause significant errors. The connection between the AD1385’s ground plane and the system’s digital ground is best made away from the AD1385. This will prevent noisy system ground currents from passing through critical parts of the ADC. In a very noisy environment it may be wise to isolate the entire analog circuit. Figure 14 shows the required isolation provided by a digital buffer. The buffer can then drive resistive and/or capacitive loads without compro- mising ground at the ADC. Using separate isolated supplies for the ADC and signal source will result in a single-point connec- tion between system digital ground and the ADC’s ground plane at the digital buffer. Power Supplies and Bypassing The AD1385 has four sets of power supply pins. These are: ±5 V Analog (V DD1/VSS1) ±15 V (+VS1/–VS1) ±15 V (+VS2/–VS2) ±5 V Power (V DD2/VSS2) A single source may be used to supply like voltages (e.g., VDD1, VDD2 from the same +5 V supply). Each of the four ±5 V supply pins should have a distinct low impedance connection to a well-bypassed central source node. This is required because each pin draws large transient currents. These dynamic cur- rents, if passed through a common supply path, would intro- duce crosstalk and increase the AD1385’s apparent noise. The two sets of ±15 V supplies need not be split in this fashion. Every AD1385 supply pin should be bypassed to the ground plane with a high quality ceramic capacitor of 0.01 µF to 0.1 µF. This capacitor should be located as close as possible to the AD1385 to minimize lead lengths. Each VDD and VSS pin must also be bypassed to the ground plane with a 10 µF solid tanta- lum bypass capacitor located close to the AD1385. Ten micro- farad bypass capacitors for ±V S2 (Pins 21 and 23) are also necessary. These power distribution concepts are shown in Figure 15. All power supplies should be of the linear type. Switching power supplies are not recommended as they can introduce consider- able high frequency noise into sensitive analog signal paths, de- grading the AD1385’s apparent performance. Supply pins of equivalent voltage should not be allowed to differ by more than 0.3 V. |
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