Datenblatt-Suchmaschine für elektronische Bauteile |
|
AD5542LR Datenblatt(PDF) 11 Page - Analog Devices |
|
AD5542LR Datenblatt(HTML) 11 Page - Analog Devices |
11 / 12 page AD5541/AD5542 –11– REV. A Reference and Ground As the input impedance is code-dependent, the reference pin should be driven from a low-impedance source. The AD5541/ AD5542 operates with a voltage reference ranging from 2 V to VDD. References below 2 V will result in reduced accuracy. The DAC’s full-scale output voltage is determined by the reference. Tables I and II outline the analog output voltage or particular digital codes. For optimum performance, Kelvin sense connections are provided on the AD5542. If the application doesn’t require separate force and sense lines, they should be tied together close to the package to minimize voltage drops between the package leads and the internal die. Power-On Reset These parts have a power-on reset function to ensure the output is at a known state upon power-up. On power-up, the DAC register contains all zeros, until data is loaded from the serial register. However, the serial register is not cleared on power-up, so its contents are undefined. When loading data initially to the DAC, 16 bits or more should be loaded to prevent erroneous data appearing on the output. If more than 16 bits are loaded, the last 16 are kept, and if less than 16 are loaded, bits will remain from the previous word. If the AD5541/AD5542 needs to be interfaced with data shorter than 16 bits, the data should be padded with zeros at the LSBs. Power Supply and Reference Bypassing For accurate high-resolution performance, it is recommended that the reference and supply pins be bypassed with a 10 µF tantalum capacitor in parallel with a 0.1 µF ceramic capacitor. MICROPROCESSOR INTERFACING Microprocessor interfacing to the AD5541/AD5542 is via a serial bus that uses standard protocol compatible with DSP processors and microcontrollers. The communications channel requires a 3-wire interface consisting of a clock signal, a data signal and a synchronization signal. The AD5541/AD5542 requires a 16-bit data word with data valid on the rising edge of SCLK. The DAC update may be done automatically when all the data is clocked in or it may be done under control of LDAC (AD5542 only). AD5541/AD5542–ADSP-2101/ADSP-2103 Interface Figure 21 shows a serial interface between the AD5541/AD5542 and the ADSP-2101/ADSP-2103. The ADSP-2101/ADSP-2103 should be set to operate in the SPORT transmit alternate framing mode. The ADSP-2101/ADSP-2103 is programmed through the SPORT control register and should be configured as follows: Internal Clock Operation, Active Low Framing, 16-Bit Word Length. Transmission is initiated by writing a word to the Tx regis- ter after the SPORT has been enabled. As the data is clocked out on each rising edge of the serial clock, an inverter is required between the DSP and the DAC, because the AD5541/AD5542 clocks data in on the falling edge of the SCLK. SCLK DIN CS TFS DT SCLK ADSP-2101/ ADSP-2103* *ADDITIONAL PINS OMITTED FOR CLARITY. AD5541/ AD5542* LDAC** FO **AD5542 ONLY Figure 21. AD5541/AD5542 to ADSP-2101/ADSP-2103 Interface AD5541/AD5542 to 68HC11 Interface Figure 22 shows a serial interface between the AD5541/AD5542 and the 68HC11 microcontroller. SCK of the 68HC11 drives the SCLK of the DAC, while the MOSI output drives the serial data lines SDIN. CS signal is driven from one of the port lines. The 68HC11 is configured for master mode; MSTR = 1, CPOL = 0, and CPHA = 0. Data appearing on the MOSI output is valid on the rising edge of SCK. PC7 MOSI SCK 68HC11/ 68L11* PC6 SCLK DIN CS *ADDITIONAL PINS OMITTED FOR CLARITY. AD5541/ AD5542* LDAC** **AD5542 ONLY Figure 22. AD5541/AD5542 to 68HC11/68L11 Interface AD5541/AD5542 to MICROWIRE Interface Figure 23 shows an interface between the AD5541/AD5542 and any MICROWIRE-compatible device. Serial data is shifted out on the falling edge of the serial clock and into the AD5541/ AD5542 on the rising edge of the serial clock. No glue logic is required as the DAC clocks data into the input shift register on the rising edge. MICROWIRE* CS SO SCLK DIN CS SCLK *ADDITIONAL PINS OMITTED FOR CLARITY. AD5541/ AD5542* Figure 23. AD5541/AD5542 to MICROWIRE Interface AD5541/AD5542 to 80C51/80L51 Interface A serial interface between the AD5541/AD5542 and the 80C51/ 80L51 microcontroller is shown in Figure 24. TxD of the microcontroller drives the SCLK of the AD5541/AD5542, while RxD drives the serial data line of the DAC. P3.3 is a bit program- mable pin on the serial port which is used to drive CS. The 80C51/80L51 provides the LSB first, while the AD5541/ AD5542 expects the MSB of the 16-bit word first. Care should be taken to ensure the transmit routine takes this into account. When data is to be transmitted to the DAC, P3.3 is taken low. Data on RxD is valid on the falling edge of TxD, so the clock must be inverted as the DAC clocks data into the input shift regis- ter on the rising edge of the serial clock. The 80C51/80L51 transmits its data in 8-bit bytes with only eight falling clock edges occurring in the transmit cycle. As the DAC requires a 16-bit word, P3.3 must be left low after the first eight bits are transferred, and brought high after the second byte is trans- ferred. LDAC on the AD5542 may also be controlled by the 80C51/80L51 serial port output by using another bit programmable pin, P3.4. P3.3 RxD TxD 80C51/ 80L51* P3.4 SCLK DIN CS *ADDITIONAL PINS OMITTED FOR CLARITY. AD5541/ AD5542* LDAC** **AD5542 ONLY Figure 24. AD5541/AD5542 to 80C51/80L51 Interface |
Ähnliche Teilenummer - AD5542LR |
|
Ähnliche Beschreibung - AD5542LR |
|
|
Link URL |
Privatsphäre und Datenschutz |
ALLDATASHEETDE.COM |
War ALLDATASHEET hilfreich? [ DONATE ] |
Über Alldatasheet | Werbung | Kontakt | Privatsphäre und Datenschutz | Linktausch | Hersteller All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |