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Datenblatt-Suchmaschine für elektronische Bauteile |
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Datenblatt-Suchmaschine für elektronische Bauteile |
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SDP0 Datenblatt(PDF) 4 Page - Intel Corporation |
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SDP0 Datenblatt(HTML) 4 Page - Intel Corporation |
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4 / 956 page  Revisions - Intel® 82576EB GbE Controller Intel® 82576EB GbE Controller Revision: 2.85 Specification Update September 2012 4 August 11, 2010 2.72 Spec Clarifications added: • 5. Use of Wake on LAN Together with Manageability Spec Changes added: • 1. Update to PBA Number EEPROM Word Format Errata added: • 37. TimeSync: Missing Tx timestamps in SerDes mode • 38. Virtualization: Dropped Packets When Using VM-to-VM Switching September 9, 2010 2.73 Spec Clarification added: • 6. Critical Session (Keep PHY Link Up) Mode Does Not Block All PHY Resets Caused by PCIe Resets - Moved from Errata. Spec Change, language updated: • 1. Update to PBA Number EEPROM Word Format Explanation expanded to address confusion about number format. October 14, 2010 2.74 Software Clarfication: • 1. While In TCP Segmentation Offload, Each Buffer is Limited to 64 KB December 15, 2010 2.75 Spec Clarification added: • 7. SerDes: AN_TIMEOUT Only Works When Link Partner Idle Errata added: • 39. I2C Data Out Hold Time Violation April 20, 2011 2.76 Spec Changes added: • 2. PCIe: Device Control 2 Register Should Not Be Written While DMA Is Enabled • 3. Updates to PXE/iSCSI EEPROM Words Errata added: • 40. TSYNC: Auxiliary Timestamp from SDP is Unreliable May 5, 2011 2.77 Spec Change added: • 4. Updated Definition of SW EEPROM Port Identification LED Blinking (Word 0x4) July 20, 2011 2.78 Spec Changes added: • 5. SerDes Forced Mode Override EEPROM Setting • 6. Update to the Sequence in Switching Between Media Errata added: • 41. NC-SI: Get Link Status Command Might Cause Corruption of PHY Registers August 2, 2011 2.79 Software Clarification added: • 2. Serial Interfaces Programmed By Bit Banging September 14, 2011 2.80 Errata added: • 42. NC-SI: Get NC-SI Pass-through Statistics Response Format November 28, 2011 2.81 • Table 1, Product Identification and Packaging is an update. It replaces two older tables. Introduces the A2 stepping. A2 is functionally the same as A1. Errata added: • 43. PCIe: Receiver Overflow Error . December 7, 2011 2.82 • Added A2 information to status data for each errata. • Added the following text in Section 1.20: “There is an internal designator visible as a dash on the die side of some packages. It’s location may differ. The mark (looks like a dash, approximately 300X1000 μm in size) does not impact function.” December 13, 2011 2.83 • Table 1, Product Identification and Packaging. A table note has been updated. The new text is: “There is no die change for parts listed as A2. There are no Form, Fit, or Function changes to this silicon. Intel anticipates no impact to customers. This is an internal package change to provide a material solution that is RoHS compliant; Intel qualified and certified this change in the same way as it does for all products supplied to customers.” Date Revision Description |
Ähnliche Teilenummer - SDP0_3 |
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Ähnliche Beschreibung - SDP0_3 |
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