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AD734BQ Datenblatt(PDF) 8 Page - Analog Devices |
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AD734BQ Datenblatt(HTML) 8 Page - Analog Devices |
8 / 12 page AD734 –8– REV. C (10V) W = (Z2 – Z1)+ S S OPTIONAL SUMMING INPUT 10V FS Z INPUT +10mV TO +10V D 1 2 3 4 5 6 7 10 8 9 11 13 12 14 W ER VN VP DD Z1 Z2 X1 X2 U1 U2 U0 Y1 Y2 AD734 NC NC 0.1 F 0.1 F +15V –15V L L L Figure 9. Connection for Square Rooting Connections for Square-Rooting The AD734 may be used to generate an output proportional to the square-root of an input using the connections shown in Figure 9. Feedback is now via both the X and Y inputs, and is always negative because of the reversed-polarity between these two inputs. The Z input must have the polarity shown, but because it is applied to a differential port, either polarity of input can be accepted with reversal of Z1 and Z2, if necessary. The diode D, which can be any small-signal type (1N4148 being suitable) is included to prevent a latching condition which could occur if the input momentarily was of the incorrect polarity of the input, the output will be always negative. Note that the loading on the output side of the diode will be provided by the 25 k Ω of input resistance at X1 and Y2, and by the user’s load. In high speed applications it may be beneficial to include further loading at the output (to 1 k Ω minimum) to speed up response time. As in previous applications, a further signal, shown here as S, may be summed to the output; if this option is not used, this node should be connected to the load ground. DIVISION BY DIRECT DENOMINATOR CONTROL The AD734 may be used as an analog divider by directly vary- ing the denominator voltage. In addition to providing much higher accuracy and bandwidth, this mode also provides greater flexibility, because all inputs remain available. Figure 10 shows the connections for the general case of a three-input multiplier divider, providing the function W = X 1 − X 2 () Y 1 − Y 2 () U 1 − U 2 () + Z 2, (11) where the X, Y, and Z signals may all be positive or negative, but the difference U = U1 – U2 must be positive and in the range +10 mV to +10 V. If a negative denominator voltage must be used, simply ground the noninverting input of the op amp. As previously noted, the X input must have a magnitude of less than 1.25U. 2M X – INPUT Y – INPUT U – INPUT 1 2 3 4 5 6 7 10 8 9 11 13 12 14 W ER VN VP DD Z1 Z2 X1 X2 U1 U2 U0 Y1 Y2 AD734 NC LOAD GROUND 0.1 F 0.1 F +15V –15V OPTIONAL SUMMING INPUT 10V FS W = (X1 – X2) (Y1 – Y2) + Z2 U1 – U2 L L Z2 U1 U2 Figure 10. Three-Variable Multiplier/Divider Using Direct Denominator Control This connection scheme may also be viewed as a variable-gain element, whose output, in response to a signal at the X input, is controllable by both the Y input (for attenuation, using Y less than U) and the U input (for amplification, using U less than Y). The ac performance is shown in Figure 11; for these results, Y was maintained at a constant 10 V. At U = 10 V, the gain is unity and the circuit bandwidth is a full 10 MHz. At U = 1 V, the gain is 20 dB and the bandwidth is essentially unaltered. At U = 100 mV, the gain is 40 dB and the bandwidth is 2 MHz. Finally, at U = 10 mV, the gain is 60 dB and the bandwidth is 250 kHz, corresponding to a 250 MHz gain-bandwidth product. 70 60 50 40 30 20 10 0 10k 100k 1M 10M FREQUENCY – Hz U = 10mV U = 100mV U = 1V U = 10V Figure 11. Three-Variable Multiplier/Divider Performance The 2 M Ω resistor is included to improve the accuracy of the gain for small denominator voltages. At high gains, the X input offset voltage can cause a significant output offset voltage. To eliminate this problem, a low-pass feedback path can be used from W to X2; see Figure 13 for details. Where a numerator of 10 V is needed, to implement a two- quadrant divider with fixed scaling, the connections shown in Figure 12 may be used. The reference voltage output appearing between Pin 9 (ER) and Pin 8 (VN) is amplified and buffered by the second op amp, to impose 10 V across the Y1/Y2 input. Note that Y2 is connected to the negative supply in this applica- tion. This is permissible because the common-mode voltage is still high enough to meet the internal requirements. The transfer function is W = 10 V X 1 − X 2 U 1 − U 2 + Z 2 . (12) The ac performance of this circuit remains as shown in Figure 11. 100k SCALE ADJUST 200k 10V W = (X1– X2) + Z 2 U1–U2 OP AMP = AD712 DUAL 2M X – INPUT U – INPUT 1 2 3 4 5 6 7 10 8 9 11 13 12 14 W ER VN VP DD Z1 Z2 X1 X2 U1 U2 U0 Y1 Y2 AD734 L LOAD GROUND 0.1 F 0.1 F +15V –15V OPTIONAL SUMMING INPUT 10V FS L Z 2 U 1 U 2 Figure 12. Two-Quadrant Divider with Fixed 10 V Scaling |
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Ähnliche Beschreibung - AD734BQ |
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