Datenblatt-Suchmaschine für elektronische Bauteile |
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AD737KR Datenblatt(PDF) 5 Page - Analog Devices |
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AD737KR Datenblatt(HTML) 5 Page - Analog Devices |
5 / 8 page AD737 REV. C –5– Applying the Figure 12. RMS Input Level vs. Frequency for Specified Averaging Error Figure 15. Pin 2 Input Bias Current vs. Temperature Figure 11. CAV vs. Frequency for Specified Averaging Error Figure 14. Settling Time vs. RMS Input Level for Various Values of CAV Figure 10. Error vs. RMS Input Voltage (Pin 2) Using Circuit of Figure 21 Figure 13. Pin 2 Input Bias Current vs. Supply Voltage TYPES OF AC MEASUREMENT The AD737 is capable of measuring ac signals by operating as either an average responding or a true rms-to-de converter. As its name implies, an average responding converter computes the average absolute value of an ac (or ac and dc) voltage or current by full wave rectifying and low-pass filtering the input signal; this will approximate the average. The resulting output, a dc “average” level, is then scaled by adding (or reducing) gain; this scale factor converts the dc average reading to an rms equivalent value for the waveform being measured. For example, the aver- age absolute value of a sine-wave voltage is 0.636 that of VPEAK; the corresponding rms value is 0.707 times VPEAK. Therefore, for sine-wave voltages, the required scale factor is 1.11 (0.707 divided by 0.636). In contrast to measuring the “average” value, true rms measure- ment is a “universal language” among waveforms, allowing the magnitudes of all types of voltage (or current) waveforms to be compared to one another and to dc. RMS is a direct measure of the power or heating value of an ac voltage compared to that of dc: an ac signal of 1 volt rms will produce the same amount of heat in a resistor as a 1 volt dc signal. CALCULATING SETTLING TIME USING FIGURE 14 The graph of Figure 14 may be used to closely approximate the time required for the AD737 to settle when its input level is re- duced in amplitude. The net time required for the rms converter to settle will be the difference between two times extracted from the graph – the initial time minus the final settling time. As an example, consider the following conditions: a 33 µF averaging capacitor, an initial rms input level of 100 mV and a final (re- duced) input level of 1 mV. From Figure 14, the initial settling time (where the 100 mV line intersects the 33 µF line) is around 80 ms. The settling time corresponding to the new or final input level of 1 mV is approximately 8 seconds. Therefore, the net time for the circuit to settle to its new value will be 8 seconds minus 80 ms which is 7.92 seconds. Note that, because of the smooth decay characteristic inherent with a capacitor/diode combination, this is the total settling time to the final value (i.e., not the settling time to 1%, 0.1%, etc., of final value). Also, this graph provides the worst case settling time, since the AD737 will settle very quickly with increasing input levels. |
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