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AD743KN Datenblatt(PDF) 9 Page - Analog Devices

Teilenummer AD743KN
Bauteilbeschribung  Ultralow Noise BiFET Op Amp
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD743KN Datenblatt(HTML) 9 Page - Analog Devices

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AD743
HOW CHIP PACKAGE TYPE AND POWER DISSIPATION
AFFECT INPUT BIAS CURRENT
As with all JFET input amplifiers, the input bias current of the
AD743 is a direct function of device junction temperature, IB
approximately doubling every 10°C. Figure 30 shows the
relationship between bias current and junction temperature for
the AD743. This graph shows that lowering the junction
temperature will dramatically improve IB.
–60 –40
–20
0
20
40
60
80 100 120
140
–11
–10
10
–9
10
–8
10
–7
10
–6
10
10
10
–12
JUNCTION TEMPERATURE – °C
V = ±15V
T = 25°C
S
A
+
Figure 30. Input Bias Current vs. Junction Temperature
The dc thermal properties of an IC can be closely approximated
by using the simple model of Figure 31 where current represents
power dissipation, voltage represents temperature, and resistors
represent thermal resistance (
θ in °C/Watt).
= DEVICE DISSIPATION
= AMBIENT TEMPERATURE
= JUNCTION TEMPERATURE
= THERMAL RESISTANCE – JUNCTION TO CASE
= THERMAL RESISTANCE – CASE TO AMBIENT
P
IN
TJ
JC
CA
TA
WHERE:
θ
θ
P
IN
CA
TA
T
J
JC
θ
θ
JA
θ
Figure 31. A Device Thermal Model
From this model TJ = TA +
θ
JA Pin. Therefore, IB can be
determined in a particular application by using Figure 30
together with the published data for
θ
JA and power dissipation.
The user can modify
θ
JA by use of an appropriate clip-on heat
sink such as the Aavid #5801.
θ
JA is also a variable when using
the AD743 in chip form. Figure 32 shows bias current vs.
supply voltage with
θ
JA as the third variable. This graph can be
used to predict bias current after
θ
JA has been computed. Again
bias current will double for every 10°C. The designer using the
AD743 in chip form (Figure 33) must also be concerned with
both
θ
JC and
θ
CA, since
θ
JC can be affected by the type of die
mount technology used.
Typically,
θ
JC’s will be in the 3°C to 5°C/watt range; therefore,
for normal packages, this small power dissipation level may be
ignored. But, with a large hybrid substrate,
θ
JC will dominate
proportionately more of the total
θ
JA.
300
0
100
200
5
10
15
T = +25°C
A
SUPPLY VOLTAGE – ±Volts
= 165°C/W
θ
A
= 115°C/W
θ A
= 0°C/W
θ
A
J
J
J
Figure 32. Input Bias Current vs. Supply Voltage for
Various Values of
θ
JA
Figure 33. A Breakdown of Various Package Thermal
Resistances
REDUCED POWER SUPPLY OPERATION FOR
LOWER IB
Reduced power supply operation lowers IB in two ways: first, by
lowering both the total power dissipation and second, by
reducing the basic gate-to-junction leakage (Figure 32). Figure
34 shows a 40 dB gain piezoelectric transducer amplifier, which
operates without an ac coupling capacitor, over the –40°C to
+85°C temperature range. If the optional coupling capacitor is
used, this circuit will operate over the entire –55°C to +125°C
military temperature range.
Figure 34. A Piezoelectric Transducer


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