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AD829AR Datenblatt(PDF) 8 Page - Analog Devices

Teilenummer AD829AR
Bauteilbeschribung  High-Speed, Low-Noise Video Op Amp
Download  12 Pages
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD829AR Datenblatt(HTML) 8 Page - Analog Devices

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AD829
REV. E
–8–
THEORY OF OPERATION
The AD829 is fabricated on Analog Devices’ proprietary comple-
mentary bipolar (CB) process which provides PNP and NPN
transistors with similar fTs of 600 MHz. As shown in Figure 25,
the AD829 input stage consists of an NPN differential pair in
which each transistor operates at 600
µA collector current. This
gives the input devices a high transconductance and hence gives
the AD829 a low noise figure of 2 nV/
Hz @ 1 kHz.
The input stage drives a folded cascode which consists of a fast
pair of PNP transistors. These PNPs then drive a current mirror
which provides a differential-input to single-ended-output con-
version. The high speed PNPs are also used in the current-
amplifying output stage which provides high current gain of
40,000. Even under conditions of heavy loading, the high fTs
of the NPN & PNPs, produced using the CB process, permit
cascading two stages of emitter followers while still maintaining
60
° of phase margin at closed-loop bandwidths greater than
50 MHz.
Two stages of complementary emitter followers also effectively
buffer the high impedance compensation node (at the CCOMP
pin) from the output so that the AD829 can maintain a high dc
open-loop gain, even into low load impedances: 92 dB into a
150
Ω load, 100 dB into a 1 kΩ load. Laser trimming and
PTAT biasing assure low offset voltage and low offset voltage
drift enabling the user to eliminate ac coupling in many
applications.
For added flexibility, the AD829 provides access to the internal
frequency compensation node. This allows the user to customize
frequency response characteristics for a particular application.
Unity gain stability requires a compensation capacitance of
68 pF (Pin 5 to ground) which will yield a small signal band-
width of 66 MHz and slew rate of 16 V/
µs. The slew rate and
gain bandwidth product will vary inversely with compensation
capacitance. Table I and the graph of Figure 28 show the opti-
mum compensation capacitance and the resulting slew rate for a
desired noise gain. For gains between 1 and 20, CCOMP can be
chosen to keep the small signal bandwidth relatively constant.
The minimum gain which will still provide stability also de-
pends on the value of external compensation capacitance.
An RC network in the output stage (Figure 25) completely
removes the effect of capacitive loading when the amplifier is
compensated for closed-loop gains of 10 or higher. At low fre-
quencies, and with low capacitive loads, the gain from the com-
pensation node to the output is very close to unity. In this case,
C is bootstrapped and does not contribute to the compensation
capacitance of the device. As the capacitive load is increased, a
pole is formed with the output impedance of the output stage–
this reduces the gain, and subsequently, C is incompletely boot-
strapped. Therefore, some fraction of C contributes to the
compensation capacitance, and the unity gain bandwidth falls.
As the load capacitance is further increased, the bandwidth
continues to fall, and the amplifier remains stable.
Externally Compensating the AD829
The AD829 is stable with no external compensation for noise
gains greater than 20. For lower gains, there are two methods of
frequency compensating the amplifier to achieve closed-loop
stability; these are the shunt and current feedback compensation
methods.
IN
IN
+
1.2mA
OFFSET NULL
15
C
12.5pF
R
500
OUTPUT
+VS
–VS
CCOMP
15
Figure 25. AD829 Simplified Schematic
Shunt Compensation
Figures 26 and 27 show that the first method, shunt compensa-
tion, has an external compensation capacitor, CCOMP, connected
between the compensation pin and ground. This external
capacitor is tied in parallel with approximately 3 pF of inter-
nal capacitance at the compensation node. In addition, a
small capacitance, CLEAD, in parallel with resistor R2, compen-
sates for the capacitance at the amplifier’s inverting input.
50
50
COAX
CABLE
–VS
0.1 F
CCOMP
0.1 F
AD829
CLEAD
R2
VOUT
R1
+VS
VIN
1k
Figure 26. Inverting Amplifier Connection Using External
Shunt Compensation
50
50
CABLE
–VS
0.1 F
CCOMP
0.1 F
AD829
VOUT
+VS
VIN
1k
R2
CLEAD
R1
Figure 27. Noninverting Amplifier Connection Using
External Shunt Compensation


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