Datenblatt-Suchmaschine für elektronische Bauteile
  German  ▼
ALLDATASHEETDE.COM

X  

AD8321AR Datenblatt(PDF) 8 Page - Analog Devices

Teilenummer AD8321AR
Bauteilbeschribung  Gain Programmable CATV Line Driver
Download  19 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD8321AR Datenblatt(HTML) 8 Page - Analog Devices

Back Button AD8321AR Datasheet HTML 4Page - Analog Devices AD8321AR Datasheet HTML 5Page - Analog Devices AD8321AR Datasheet HTML 6Page - Analog Devices AD8321AR Datasheet HTML 7Page - Analog Devices AD8321AR Datasheet HTML 8Page - Analog Devices AD8321AR Datasheet HTML 9Page - Analog Devices AD8321AR Datasheet HTML 10Page - Analog Devices AD8321AR Datasheet HTML 11Page - Analog Devices AD8321AR Datasheet HTML 12Page - Analog Devices Next Button
Zoom Inzoom in Zoom Outzoom out
 8 / 19 page
background image
AD8321
–8–
REV. 0
The attenuation setting in the AD8321 is determined by the
8-bit word in the data latch. The SDATA load sequence is
initiated by a falling edge on
DATEN. The gain control data
(SDATA) is serially loaded (MSB first) into the 7-bit shift register
at each rising edge of the clock. See Figure 24. While
DATEN
is low, the data latch holds the previous data word allowing the
attenuation level to remain unchanged. After eight clock cycles
the new data word is fully loaded and
DATEN is switched high.
This enables the data latch and the loaded register data is passed to
the attenuator with the updated gain value. Also at this
DATEN
transition, the internal clock is disabled, thus inhibiting new
serial input data.
The power amplifier has two basic modes of operation. A for-
ward mode (or power-up mode) and a reverse mode (or power-
down) mode. In the power-up mode (
PD = 1), the power
amplifier stage is enabled and the AD8321 has a maximum gain
of 20 V/V or 26 dB (into 75
Ω). With a total attenuation of
53.43 dB in the DAC, vernier and preamp, the AD8321’s total
gain range is 26 dB to –27.43 dB. In both the forward or reverse
mode the single-ended output signal maintains a dc level of
VCC/2. This dc output level provides for optimum large signal
linearity.
In the power-down mode (
PD = 0), the power amplifier is
turned off and a “reverse” amplifier (the inner triangle in Figure
22) is enabled. During this 1-to-0 transition, the output power
is disabled. This assures that S11 and S22 remain approximately
equal to zero thus minimizing line reflections. In the time do-
main, as
PD switches states, a transitional glitch and pedestal
offset results (See Figures 14 and 15). These anomalies have
been minimized by temperature compensated internal circuitry
and laser trimming. The powered down supply current drops to
52 mA versus 90 mA in the power-up mode.
APPLICATIONS
General Application
The AD8321 is primarily intended for use as the return path
(also called upstream path) Power Amplifier (PA) or line driver
in cable modem applications. Upstream data is modulated in
either QPSK or QAM format. This is done either in DSP or by
a dedicated QPSK/QAM modulator such as the AD9853 or
other modem/modulator chip. The amplifier receives its input
signal either from the dedicated QPSK/QAM modulator or from
a DAC. In both cases, the signal must be low-pass filtered be-
fore being applied to the line driving amplifier. Because the
distance to the central office varies from cable modem sub-
scriber to subscriber, resulting in various line losses, signals from
various subscribers will require attenuation while others may
require gain. As a result, the AD8321 line driver is required to
vary its output applying attenuation or gain as needed so that all
signals arriving at the central office are of the same amplitude.
DOCSIS (Data Over Cable Service Interface Specifications)
requires a cable modem output signal ranging in power from a
minimum of 8 dBmV to a maximum of 58 dBmV. In cable
modem applications where DOCSIS compliance is desired, the
AD8321 amplifier must be used in conjunction with a 75
matching attenuator connected between the AD8321 output
and the low-pass input port of the diplexer. See the schematic in
Figure 28. The matching attenuator is used to achieve DOCSIS-
compliant noise levels at the lower end of the AD8321 output
power range. The insertion loss of a diplexer is typically less
than 1 dB. As a result of these combined losses, the PA line
driver must be capable of delivering sufficient power into a 75
load while maintaining reasonable distortion performance at the
output of the modem. (See sections containing “DOCSIS” for
further information. All references to DOCSIS pertain to
SP-RFI-I04-980724 entitled Radio Frequency Interface
Specification.)
TES
VALID DATA WORD G1
MSB. . . .LSB
GAIN TRANSFER (G1)
TDS
TEH
8 CLOCK CYCLES
GAIN TRANSFER (G2)
TOFF
TGS
ANALOG
OUTPUT
SIGNAL AMPLITUDE (p-p)
PD
PEDESTAL
CLK
SDATA
DATEN
TON
TC
TWH
VALID DATA WORD G2
Figure 24. Serial Interface Timing


Ähnliche Teilenummer - AD8321AR

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
Analog Devices
AD8321AR AD-AD8321AR Datasheet
593Kb / 20P
   Gain Programmable CATV Line DRiver
REV. A
AD8321AR-REEL AD-AD8321AR-REEL Datasheet
593Kb / 20P
   Gain Programmable CATV Line DRiver
REV. A
AD8321ARZ AD-AD8321ARZ Datasheet
593Kb / 20P
   Gain Programmable CATV Line DRiver
REV. A
AD8321ARZ-REEL2 AD-AD8321ARZ-REEL2 Datasheet
593Kb / 20P
   Gain Programmable CATV Line DRiver
REV. A
AD8321ARZ2 AD-AD8321ARZ2 Datasheet
593Kb / 20P
   Gain Programmable CATV Line DRiver
REV. A
More results

Ähnliche Beschreibung - AD8321AR

HerstellerTeilenummerDatenblattBauteilbeschribung
logo
Analog Devices
AD8321ARZ AD-AD8321ARZ Datasheet
593Kb / 20P
   Gain Programmable CATV Line DRiver
REV. A
AD8321 AD-AD8321_05 Datasheet
721Kb / 20P
   Gain Programmablea CATV Line Driver
REV. A
AD8326 AD-AD8326 Datasheet
475Kb / 24P
   High Output Power Programmable CATV Line Driver
REV. 0
AD8326 AD-AD8326_15 Datasheet
1Mb / 24P
   High Output Power Programmable CATV Line Driver
REV. 0
logo
Texas Instruments
DRV612 TI-DRV612_15 Datasheet
934Kb / 24P
[Old version datasheet]   2-Vrms DirectPath??Line Driver With Programmable-Fixed Gain
DRV612 TI-DRV612 Datasheet
660Kb / 23P
[Old version datasheet]   2-Vrms DirectPath??Line Driver With Programmable-Fixed Gain
DRV612 TI1-DRV612_16 Datasheet
888Kb / 22P
[Old version datasheet]   2-Vrms DirectPath Line Driver With Programmable-Fixed Gain
DRV601 TI-DRV601_15 Datasheet
908Kb / 19P
[Old version datasheet]   DIRECTPATH??STEREO LINE DRIVER, ADJUSTABLE GAIN
logo
TriQuint Semiconductor
TGA2803-SM TRIQUINT-TGA2803-SM_15 Datasheet
574Kb / 14P
   CATV TIA Gain Block
logo
Texas Instruments
DRV601 TI-DRV601 Datasheet
552Kb / 16P
[Old version datasheet]   DIRECTPATH??STEREO LINE DRIVER, ADJUSTABLE GAIN
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19


Datenblatt Download

Go To PDF Page


Link URL




Privatsphäre und Datenschutz
ALLDATASHEETDE.COM
War ALLDATASHEET hilfreich?  [ DONATE ] 

Über Alldatasheet   |   Werbung   |   Kontakt   |   Privatsphäre und Datenschutz   |   Linktausch   |   Hersteller
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com