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FAN54012UCX(1) Datenblatt(PDF) 10 Page - Fairchild Semiconductor |
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FAN54012UCX(1) Datenblatt(HTML) 10 Page - Fairchild Semiconductor |
10 / 36 page © 2011 Fairchild Semiconductor Corporation www.fairchildsemi.com FAN5401X Family • Rev. 1.0.4 10 I 2C Timing Specifications Guaranteed by design. Symbol Parameter Conditions Min. Typ. Max. Unit tFDA SDA Fall Time Standard Mode 20+0.1CB 300 ns Fast Mode 20+0.1CB 300 High-Speed Mode, CB < 100 pF 10 80 High-Speed Mode, CB < 400 pF 20 160 tSU;STO Stop Condition Setup Time Standard Mode 4 s Fast Mode 600 ns High-Speed Mode 160 ns CB Capacitive Load for SDA, SCL 400 pF Timing Diagrams Figure 5. I 2C Interface Timing for Fast and Slow Modes Figure 6. I 2C Interface Timing for High-Speed Mode START REPEATED START SCL SDA t F t HD;STA t LOW t R t HD;DAT t HIGH T SU;DAT t SU;STA t HD;STO t BUF START STOP t HD;STA REPEATED START SCLH SDAH t FDA t LOW t RCL1 t HD;DAT t HIGH t SU;STO REPEATED START t RDA t FCL t SU;DAT t RCL STOP = MCS Current Source Pull-up = R P Resistor Pull-up note A Note A: First rising edge of SCLH after Repeated Start and after each ACK bit. t HD;STA t SU;STA |
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