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AD96687BQ Datenblatt(PDF) 5 Page - Analog Devices |
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AD96687BQ Datenblatt(HTML) 5 Page - Analog Devices |
5 / 6 page AD96685/AD96687 –5– REV. C APPLICATIONS INFORMATION The AD96685/87 comparators are very high speed devices. Consequently, high speed design techniques must be employed to achieve the best performance. The most critical aspect of any AD96685/87 design is the use of a low impedance ground plane. Another area of particular importance is power supply decoupling. Normally, both power supply connections should be separately decoupled to ground through 0.1 µF ceramic and 0.001 µF mica capacitors. The basic design of comparator cir- cuits makes the negative supply somewhat more sensitive to variations. As a result more attention should be placed on insur- ing a “clean” negative supply. The LATCH ENABLE input is active LOW (latched). If the latching function is not used, the LATCH ENABLE input should be grounded (ground is an ECL logic HIGH). The LATCH ENABLE input of the AD96687 should be tied to –2.0 V or left “floating,” to disable the latching function. An alternate use of the LATCH ENABLE input is as a hysteresis control input. By varying the voltage at the LATCH ENABLE input for the AD96685 and the differential voltage between both latch inputs for the AD96687, small variations in the hysteresis can be achieved. Occasionally, one of the two comparator stages within the AD96687 will not be used. The inputs of the unused compara- tor should not be allowed to “float.” The high internal gain may cause the output to oscillate (possibly affecting the other com- parator which is being used) unless the output is forced into a fixed state. This is easily accomplished by insuring that the two inputs are at least one diode drop apart, while also grounding the LATCH ENABLE input. The best performance will be achieved with the use of proper ECL terminations. The open-emitter outputs of the AD96685/87 are designed to be terminated through 50 Ω resis- tors to –2.0 V, or any other equivalent ECL termination. If high speed ECL signals must be routed more than a few centimeters, MicroStrip or StripLine techniques may be required to insure proper transition times and prevent output ringing. The AD96685/87 have been specifically designed to reduce propagation delay dispersion over an input overdrive range of 100 mV to 1 V. Propagation delay dispersion is the change in propagation delay which results from a change in the degree of overdrive (how far the switching point is exceeded by the input). The overall result is a higher degree of timing accuracy since the AD96685/87 is far less sensitive to input variations than most comparator designs. Typical Applications HIGH SPEED SAMPLING CIRCUIT HIGH SPEED WINDOW COMPARATOR ORDERING GUIDE Temperature Package Model Type Range Description Options AD96685BH Single –25 °C to +85°C 10-Pin Can, Industrial H-10A AD96685BP Single –25 °C to +85°C 20-Pin PLCC, Industrial P-20A AD96685BQ Single –25 °C to +85°C 16-Pin DIP, Industrial Q-16 AD96685BR Single –25 °C to +85°C 16-Pin SOIC, Industrial R-16A AD96685BP-REEL Single –25 °C to +85°C 20-Pin PLCC, Industrial P-20A AD96685TQ Single –55 °C to +125°C 16-Pin DIP, Extended Temperature Q-16 AD96687BP Dual –25 °C to +85°C 20-Pin PLCC, Industrial P-20A AD96687BQ Dual –25 °C to +85°C 16-Pin DIP, Industrial Q-16 AD96687BR Dual –25 °C to +85°C 16-Pin SOIC, Industrial R-16A AD96687BR-REEL Dual –25 °C to +85°C 16-Pin SOIC, Industrial R-16A AD96687TQ Dual –55 °C to +125°C 16-Pin DIP, Extended Temperature Q-16 |
Ähnliche Teilenummer - AD96687BQ |
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Ähnliche Beschreibung - AD96687BQ |
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