Datenblatt-Suchmaschine für elektronische Bauteile |
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74ALVC16721 Datenblatt(PDF) 1 Page - Fairchild Semiconductor |
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74ALVC16721 Datenblatt(HTML) 1 Page - Fairchild Semiconductor |
1 / 6 page © 2001 Fairchild Semiconductor Corporation DS500691 www.fairchildsemi.com October 2001 Revised October 2001 74ALVC16721 Low Voltage 20-Bit D-Type Flip-Flops with 3.6V Tolerant Inputs and Outputs General Description The ALVC16721 contains twenty non-inverting D-type flip-flops with 3-STATE outputs and is intended for bus ori- ented applications. The 74ALVC16721 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V. The 74ALVC16721 is fabricated with an advanced CMOS technology to achieve high speed operation while maintain- ing low CMOS power dissipation. Features s 1.8V–3.6V VCC supply operation s 3.6V tolerant inputs and outputs s tPD (CLK to On) 4.0 ns max for 3.0V to 3.6V VCC 4.9 ns max for 2.3V to 2.7V VCC 8.8 ns max for 1.65V to 1.95V VCC s Power-off high impedance inputs and outputs s Supports live insertion and withdrawal (Note 1) s Uses patented noise/EMI reduction circuitry s Latchup conforms to JEDEC JED78 s ESD performance: Human body model > 2000V Machine model > 200V Note 1: To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Code: Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code. Logic Symbol Pin Descriptions Order Number Package Number Package Description 74ALVC16721MTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Pin Names Description OE Output Enable Input (Active LOW) CLK Clock Input D0–D19 Inputs O0–O19 Outputs CE Clock Enable Input (Active LOW) |
Ähnliche Teilenummer - 74ALVC16721 |
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Ähnliche Beschreibung - 74ALVC16721 |
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