March 1998

Revised April 1999

© 1999 Fairchild Semiconductor Corporation

DS500131.prf

www.fairchildsemi.com

74VCX16827

Low Voltage 20-Bit Buffer/Line Driver with 3.6V Tolerant

Inputs and Outputs

General Description

The VCX16827 contains twenty non-inverting buffers with

3-STATE outputs to be employed as a memory and

address driver, clock driver, or bus oriented transmitter/

receiver carrying parity. The device is byte controlled. Each

byte has NOR output enables for maximum control flexibil-

ity.

The 74VCX16827 is designed for low voltage (1.65V to

The 74VCX16827 is fabricated with an advanced CMOS

technology to achieve high speed operation while maintain-

ing low CMOS power dissipation.

Features

s 3.6V tolerant inputs and outputs

s Power-off high impedance inputs and outputs

s Supports live insertion and withdrawal (Note 1)

±24 mA @ 3.0V V

CC

±18 mA @ 2.3V V

CC

±6 mA @ 1.65V V

CC

s Uses patented noise/EMI reduction circuitry

s Latch-up performance exceeds 300 mA

s ESD performance:

Human body model

> 2000V

Machine model

> 200V

Note 1: To ensure the high-impedance state during power up or power

value of the resistor is determined by the current-sourcing capability of the

driver.

Ordering Code:

Devices also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbol

Pin Descriptions

Order Number

Package Number

Package Description

74VCX16827MTD

MTD56

56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide

Pin Names

Description

Output Enable Input (Active LOW)

Inputs

Outputs