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DM74AS648NT Datenblatt(Datasheet) 5 Page - Fairchild Semiconductor

Teile-Nr. DM74AS648NT
Beschreibung  Octal Bus Transceiver and Register
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Hersteller  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
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DM74AS646 Switching Characteristics
Note 6: These parameters are measured with the internal output state of the storage register opposite to that of the bus input.
Symbol
Parameter
Conditions
From
To
Min
Max
Units
(Input)
(Output)
fMAX
Maximum Clock
VCC = 4.5V to 5.5V,
90
MHz
Frequency
R1 = R2 = 500Ω
tPLH
Propagation Delay Time
CL = 50 pF
28.5
ns
LOW-to-HIGH Level Output
CBA or CAB
A or B
tPHL
Propagation Delay Time
29
ns
HIGH-to-LOW Level Output
tPLH
Propagation Delay Time
29
ns
LOW-to-HIGH Level Output
A or B
B or A
tPHL
Propagation Delay Time
17
ns
HIGH-to-LOW Level Output
tPLH
Propagation Delay Time
211
ns
LOW-to-HIGH Level Output
SBA or SAB
A or B
tPHL
Propagation Delay Time
29
ns
HIGH-to-LOW Level Output
(Note 6)
tPZH
Output Enable Time
29
ns
to HIGH Level Output
tPZL
Output Enable Time
314
ns
to LOW Level Output
Enable G
A or B
tPHZ
Output Disable Time
29
ns
from HIGH Level Output
tPLZ
Output Disable Time
29
ns
from LOW Level Output
tPZH
Output Enable Time
316
ns
to HIGH Level Output
tPZL
Output Enable Time
318
ns
to LOW Level Output
DIR
A or B
tPHZ
Output Disable Time
210
ns
from HIGH Level Output
tPLZ
Output Disable Time
210
ns
from LOW Level Output




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