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DM74LS155 Datenblatt(PDF) 1 Page - Fairchild Semiconductor |
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DM74LS155 Datenblatt(HTML) 1 Page - Fairchild Semiconductor |
1 / 6 page © 2000 Fairchild Semiconductor Corporation DS006395 www.fairchildsemi.com August 1986 Revised April 2000 DM74LS155 • DM74LS156 Dual 2-Line to 4-Line Decoders/Demultiplexers General Description These TTL circuits feature dual 1-line-to-4-line demultiplex- ers with individual strobes and common binary-address inputs in a single 16-pin package. When both sections are enabled by the strobes, the common address inputs sequentially select and route associated input data to the appropriate output of each section. The individual strobes permit activating or inhibiting each of the 4-bit sections as desired. Data applied to input C1 is inverted at its outputs and data applied at C2 is true through its outputs. The inverter following the C1 data input permits use as a 3-to-8- line decoder, or 1-to-8-line demultiplexer, without external gating. Input clamping diodes are provided on these cir- cuits to minimize transmission-line effects and simplify sys- tem design. Features s Applications: Dual 2-to-4-line decoder Dual 1-to-4-line demultiplexer 3-to-8-line decoder 1-to-8-line demultiplexer s Individual strobes simplify cascading for decoding or demultiplexing larger words s Input clamping diodes simplify system design s Choice of outputs: Totem-pole (DM74LS155) Open-collector (DM74LS156) Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Order Number Package Number Package Description DM74LS155M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS155N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide DM74LS156M M16A 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow DM74LS156N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide |
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Ähnliche Beschreibung - DM74LS155 |
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