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MCP79412 Datenblatt(PDF) 9 Page - Microchip Technology |
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MCP79412 Datenblatt(HTML) 9 Page - Microchip Technology |
9 / 60 page 2010-2013 Microchip Technology Inc. DS20002266E-page 9 MCP79410/MCP79411/MCP79412 4.0 RTCC FUNCTIONALITY The MCP7941X family is a highly integrated RTCC. On- board time and date counters are driven from a low-power oscillator to maintain the time and date. An integrated VCC switch enables the device to maintain the time and date, and also the contents of the SRAM during a VCC power failure if an external supply is connected to the VBAT pin and configured. 4.1 Crystal oscillator The crystal oscillator built into the MCP7941X has been designed to operate with a standard 32.768 kHz tuning fork crystal. The MCP7941X family of devices require both an external crystal and matching external load capacitors. Capacitors are not included on-chip. Suitable crystals have a load capacitance (CL) of 6-9 pF. We do not recommend using crystals with a load capacitance (CL) of 12.5 pF. Figure 9.1 shows the required external oscillator com- ponents. CX1 and CX2 pin capacitance and stray capac- itance form the crystal load. This is calculated using the equation below: EQUATION 4-1: CL CALCULATION FIGURE 4-1: OSCILLATOR SCHEMATIC For a list of tested and recommended crystals, please refer to AN1519, “Recommended Crystals for Micro- chip Stand-Alone Real-Time Clock Calendar Devices”. This document provides a reference for suitable crystals and recommended load capacitors. For information on suggested board layout, please refer to AN1365, “Recommended Usage of Microchip Serial RTCC Devices”. It is recommended that the final application should be tested with the chosen crystal and capacitor combina- tions across all operating and environmental condi- tions. Please also consult the crystal specification to observe correct handling and reflow conditions during assembly. 4.2 RTCC Memory Map The RTCC registers are contained in addresses 0x00- 0x1f. 64 bytes of user-accessible SRAM are located in the address range 0x20-0x5f. The SRAM memory is a separate block from the RTCC Control and Configu- ration registers. All SRAM locations are battery- backed-up during a VCC power fail. Unused locations are not accessible, MCP7941X will noACK after the address byte if the address is out of range, as shown in the shaded region of the memory map in Figure 4-2. • Addresses 0x00-0x06 are the RTCC Time and Date registers. • Addresses 0x07-0x09 are the device Configura- tion, Calibration and ID Unlock registers. • Addresses 0x0A-0x10 are the Alarm 0 registers. These are used to set up the Alarm 0, the Inter- rupt polarity and the Alarm 0 Compare. • Addresses 0x11-0x17 are the same as 0x0Bh- 0x11h but are used for Alarm 1. • Addresses 0x18-0x1F are used for the time- stamp feature. The detailed memory map is shown in Table 4-1. No error checking is provided when loading Time and Date registers. CL Cx2 Cx1 Cx2 Cx1 + -------------------------Cstray + = X1 X2 RTCC CX1 CX2 Note: These are Read/Write registers. Care must be taken when writing to these regis- ters with the oscillator running. Incorrect data can appear in the Time and Date reg- isters if a write is attempted during the time frame where these internal registers are being incremented. The user can min- imize the likelihood of data corruption by ensuring that any writes to the Time and Date registers occur before the contents of the second register reach a value of 0x59. |
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Ähnliche Beschreibung - MCP79412 |
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