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AD660BR-REEL Datenblatt(PDF) 4 Page - Analog Devices

Teilenummer AD660BR-REEL
Bauteilbeschribung  Monolithic 16-Bit Serial/Byte DACPORT
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
Logo AD - Analog Devices

AD660BR-REEL Datenblatt(HTML) 4 Page - Analog Devices

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AD660
Rev. B | Page 4 of 20
Parameter
AD660AN/AR/SQ
AD660BN/BR
Unit
Min
Typ
Max
Min
Typ
Max
POWER SUPPLIES
Voltage
+VCC6
+13.5
+16.5
+13.5
+16.5
V
−VEE6
−13.5
−16.5
−13.5
−16.5
V
+VLL
+4.5
+5.5
+4.5
+5.5
V
Current (No Load)
ICC
+12
+18
+12
+18
mA
IEE
−12
−18
−12
−18
mA
ILL
@ VIH = 5 V, VIL = 0 V
0.3
2
0.3
2
mA
@ VIH = 2.4 V, VIL = 0.4 V
3
7.5
3
7.5
mA
Power Supply Sensitivity
1
2
1
2
ppm/%
Power Dissipation (Static, No Load)
365
625
365
625
mW
TEMPERATURE RANGE
Specified Performance (A, B)
−40
+85
−40
+85
°C
Specified Performance (S)
−55
+125
°C
1 For 16-bit resolution, 1 LSB = 0.0015% of FSR. For 15-bit resolution, 1 LSB = 0.003% of FSR. For 14-bit resolution, 1 LSB = 0.006% of FSR. FSR stands for full-scale range
and is 10 V in a unipolar mode and 20 V in bipolar mode.
2 Gain error and gain drift are measured using the internal reference. The internal reference is the main contributor to gain drift. If lower gain drift is required, the AD660
can be used with a precision external reference such as the AD587, AD586, or AD688.
3 Gain error is measured with fixed 50 Ω resistors as shown in the Theory of Operation section. Eliminating these resistors increases the gain error by 0.25% of FSR
(unipolar mode) or 0.50% of FSR (bipolar mode).
4 DAC gain error and drift are measured with an external voltage reference. They represent the error contributed by the DAC alone, for use with an external reference.
5 External current is defined as the current available in addition to that supplied to REF IN and SPAN/BIPOLAR OFFSET on the AD660.
6 Operation on ±12 V supplies is possible using an external reference such as the AD586 and reducing the output range. Refer to the Internal/External Reference Use
section.
AC PERFORMANCE CHARACTERISTICS
With the exception of total harmonic distortion + noise (THD + N) and signal-to-noise (SNR) ratio, these characteristics are included for
design guidance only and are not subject to test. THD + N and SNR are 100% tested.
TMIN ≤ TA ≤ TMAX, +VCC = 15 V, −VEE = −15 V, +VLL = 5 V except where noted.
Table 2.
Parameter
Limit
Unit
Test Conditions/Comments
OUTPUT SETTLING TIME
13
μs max
20 V step, TA = 25°C
(Time to ±0.0008% FS
8
μs typ
20 V step, TA = 25°C
with 2 kΩ, 1000 pF Load)
10
μs typ
20 V step, TMIN ≤ TA ≤ TMAX
6
μs typ
10 V step, TA = 25°C
8
μs typ
10 V step, TMIN ≤ TA ≤ TMAX
2.5
μs typ
1 LSB step, TMIN ≤ TA ≤ TMAX
TOTAL HARMONIC DISTORTION + NOISE
A, B, S Grade
0.009
% max
0 dB, 990.5 Hz, sample rate = 96 kHz, TA = 25°C
A, B, S Grade
0.056
% max
−20 dB, 990.5 Hz, sample rate = 96 kHz, TA = 25°C
A, B, S Grade
5.6
% max
−60 dB, 990.5 Hz, sample rate = 96 kHz, TA = 25°C
SIGNAL-TO-NOISE RATIO
83
dB min
TA = 25°C
DIGITAL-TO-ANALOG GLITCH IMPULSE
15
nV-s typ
DAC alternately loaded with 0x8000 and 0x7FFF
DIGITAL FEEDTHROUGH
2
nV-s typ
DAC alternately loaded with 0x0000 and 0xFFFF, CS high
OUTPUT NOISE VOLTAGE
Density (1 kHz to 1 MHz)
120
nV/√Hz typ
Measured at VOUT, 20 V span, excludes reference
REFERENCE NOISE
125
nV/√Hz typ
Measured at REF OUT


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