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AD5341BRU-REEL7 Datenblatt(PDF) 10 Page - Analog Devices

Teilenummer AD5341BRU-REEL7
Bauteilbeschribung  2.5 V to 5.5 V, 115 關A, Parallel Interface Single Voltage-Output 8-/10-/12-Bit DACs
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
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AD5341BRU-REEL7 Datenblatt(HTML) 10 Page - Analog Devices

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AD5330/AD5331/AD5340/AD5341
Rev. A | Page 10 of 28
BUFFER
12-BIT
DAC
LOW BYTE
REGISTER
POWER-DOWN
LOGIC
BUF
DB7
DB0
..
HBEN
CS
WR
CLR
LDAC
VREF
VDD
VOUT
PD
GND
AD5341
POWER-ON
RESET
RESET
9
7
6
1
13
20
2
GAIN 8
3
12
4
11
5
HIGH BYTE
REGISTER
10
20
19
18
17
16
15
14
13
12
11
1
2
3
4
5
6
7
8
9
10
LDAC
GAIN
WR
CS
GND
VREF
VOUT
CLR
DB7
DB6
DB5
DB4
DB3
DB2
DB1
DB0
VDD
PD
TOP VIEW
(Not to Scale)
AD5341
10-BIT
HBEN
BUF
Figure 9. AD5341 Functional Block Diagram
Figure 10. AD5341 Pin Configuration
Table 8. AD5341 Pin Function Descriptions
Pin No.
Mnemonic
Description
1
HBEN
High Byte Enable Pin. This pin is used when writing to the device to determine if data is written to the high
byte register or the low byte register.
2
BUF
Buffer Control Pin. This pin controls whether the reference input to the DAC is buffered or unbuffered.
3
VREF
Reference Input.
4
VOUT
Output of DAC. Buffered output with rail-to-rail operation.
5
GND
Ground reference point for all circuitry on the part.
6
CS
Active low Chip Select Input. This is used in conjunction with WR to write data to the parallel interface.
7
WR
Active Low Write Input. This is used in conjunction with CS to write data to the parallel interface.
8
GAIN
Gain Control Pin. This controls whether the output range from the DAC is 0 V to VREF or 0 V to 2 × VREF.
9
CLR
Asynchronous active low control input that clears all input registers and DAC registers to zero.
10
LDAC
Active low control input that updates the DAC registers with the contents of the input registers.
11
PD
Power-Down Pin. This active low control pin puts the DAC into power-down mode.
12
VDD
Power Supply Input. These parts can operate from 2.5 V to 5.5 V and the supply should be decoupled with a
10 μF capacitor in parallel with a 0.1 μF capacitor to GND.
13 to 20
DB0 to DB7
Eight Parallel Data Inputs. DB7 is the MSB of these eight bits.


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