74HC4520D datasheet(7/7 Pages) NXP

Teilenummer	74HC4520D

Bauteilbeschribung	Dual 4-bit synchronous binary counter

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December 1990

7

Philips Semiconductors

Product speciﬁcation

Dual 4-bit synchronous binary counter

74HC/HCT4520

AC WAVEFORMS

PACKAGE OUTLINES

See

“74HC/HCT/HCU/HCMOS Logic Package Outlines”.

Fig.7

Waveforms showing removal time for nMR; minimum nCP0, nCP1, nMR pulse widths and maximum clock

pulse frequency.

Conditions:

nCP1 = HIGH while nCP0 is triggered on a LOW-to-HIGH transition; tW

and trem also apply when nCP0 = LOW and nCP1 is triggered on a

HIGH-to-LOW transition.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.8

Waveforms showing set-up times for nCP0 to nCP1 and nCP1 to nCP0, propagation delays and output

transition times.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

Fig.9 Waveforms showing propagation delay from nMR to nQn output.

(1) HC : VM = 50%; VI = GND to VCC.

HCT: VM = 1.3 V; VI = GND to 3 V.

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