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FM28V202-TGTR Datenblatt(PDF) 6 Page - Cypress Semiconductor |
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FM28V202-TGTR Datenblatt(HTML) 6 Page - Cypress Semiconductor |
6 / 18 page FM28V202 - 128Kx16 F-RAM Document Number: 001-86602 Rev. ** Page 6 of 18 requires an exact inversion of the data byte. A flow chart of the entire write protect operation is shown in Figure 2. The write-protect settings are nonvolatile. The factory default: all blocks are unprotected. Normal Memory Operation Read 12555h? Read 1DAAAh? Any other operation Read 01333h? Read 0ECCCh? Read 000FFh? Read 1FF00? Hold Data Byte Write 0ECCC? Data Complement? y n n n n n y y y y y n y Write 1DAAA? y Write 0FF00? y n Enter new write protect settings n Read 1AAAA? Write 0ECCC? y Drive write protect data out Read 00000? n y n Change Write Protect Settings Read Write Protect Settings Sequence Detector Read 00000? Figure 2. Write-Protect State Machine For example, the following sequence write-protects addresses from 0C000h to 13FFFh (sectors 3 & 4): Address Data Read 12555h - Read 1DAAAh - Read 01333h - Read 0ECCCh - Read 000FFh - Read 1FF00h - Write 1DAAAh 18h ; bits 3 & 4 = 1 Write 0ECCCh E7h ; complement of 18h Write 0FF00h - ; Data is don’t care Read 00000h - ; return to Normal Operation |
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