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LM1085ISX-ADJ Datenblatt(PDF) 8 Page - Texas Instruments |
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LM1085ISX-ADJ Datenblatt(HTML) 8 Page - Texas Instruments |
8 / 22 page LM1085 SNVS038G – JULY 1999 – REVISED MARCH 2013 www.ti.com The adjustable versions allows an additional capacitor to be used at the ADJ pin to increase ripple rejection. If this is done the output capacitor should be increased to 22uF for tantalums or to 150uF for aluminum. Capacitors other than tantalum or aluminum can be used at the adjust pin and the input pin. A 10uF capacitor is a reasonable value at the input. See RIPPLE REJECTION section regarding the value for the adjust pin capacitor. It is desirable to have large output capacitance for applications that entail large changes in load current (microprocessors for example). The higher the capacitance, the larger the available charge per demand. It is also desirable to provide low ESR to reduce the change in output voltage: V = ΔI x ESR It is common practice to use several tantalum and ceramic capacitors in parallel to reduce this change in the output voltage by reducing the overall ESR. Output capacitance can be increased indefinitely to improve transient response and stability. RIPPLE REJECTION Ripple rejection is a function of the open loop gain within the feed-back loop (refer to Figure 15 and Figure 16). The LM1085 exhibits 75dB of ripple rejection (typ.). When adjusted for voltages higher than VREF, the ripple rejection decreases as function of adjustment gain: (1+R1/R2) or VO/VREF. Therefore a 5V adjustment decreases ripple rejection by a factor of four ( −12dB); Output ripple increases as adjustment voltage increases. However, the adjustable version allows this degradation of ripple rejection to be compensated. The adjust terminal can be bypassed to ground with a capacitor (CADJ). The impedance of the CADJ should be equal to or less than R1 at the desired ripple frequency. This bypass capacitor prevents ripple from being amplified as the output voltage is increased. 1/(2 π*fRIPPLE*CADJ) ≤ R1 LOAD REGULATION The LM1085 regulates the voltage that appears between its output and ground pins, or between its output and adjust pins. In some cases, line resistances can introduce errors to the voltage across the load. To obtain the best load regulation, a few precautions are needed. Figure 17 shows a typical application using a fixed output regulator. Rt1 and Rt2 are the line resistances. VLOAD is less than the VOUT by the sum of the voltage drops along the line resistances. In this case, the load regulation seen at the RLOAD would be degraded from the data sheet specification. To improve this, the load should be tied directly to the output terminal on the positive side and directly tied to the ground terminal on the negative side. Figure 17. Typical Application using Fixed Output Regulator When the adjustable regulator is used (Figure 18), the best performance is obtained with the positive side of the resistor R1 tied directly to the output terminal of the regulator rather than near the load. This eliminates line drops from appearing effectively in series with the reference and degrading regulation. For example, a 5V regulator with 0.05 Ω resistance between the regulator and load will have a load regulation due to line resistance of 0.05Ω x IL. If R1 (= 125 Ω) is connected near the load the effective line resistance will be 0.05Ω (1 + R2/R1) or in this case, it is 4 times worse. In addition, the ground side of the resistor R2 can be returned near the ground of the load to provide remote ground sensing and improve load regulation. 8 Submit Documentation Feedback Copyright © 1999–2013, Texas Instruments Incorporated Product Folder Links: LM1085 |
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