74LVC1G14

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Product data sheet

Rev. 12 — 6 August 2012

3 of 20

NXP Semiconductors

74LVC1G14

Single Schmitt-trigger inverter

7.

Pinning information

7.1 Pinning

7.2 Pin description

Fig 4.

Pin configuration SOT353-1 and SOT753

Fig 5.

Pin configuration SOT886

74LVC1G14

n.c.

A

GND

Y

001aab655

1

2

3

5

4

74LVC1G14

A

001aab656

n.c.

GND

n.c.

Y

Transparent top view

2

3

1

5

4

6

Fig 6.

Pin configuration SOT891, SOT1115 and

SOT1202

Fig 7.

Pin configuration SOT1226 (X2SON5)

74LVC1G14

A

001aae976

n.c.

GND

n.c.

Y

Transparent top view

2

3

1

5

4

6

n.c.

GND

1

3

2

5

4

A

Y

aaa-003024

Transparent top view

74LVC1G14

Table 3.

Pin description

Symbol

Pin

Description

TSSOP5 and X2SON5

XSON6

n.c.

1

1

not connected

A

2

2

data input

GND

3

3

ground (0 V)

Y

4

4

data output

n.c.

-

5

not connected

5

6

supply voltage