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AD8347ARUZ Datenblatt(PDF) 7 Page - Analog Devices

Teilenummer AD8347ARUZ
Bauteilbeschribung  0.8 GHz to 2.7 GHz Direct Conversion
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Hersteller  AD [Analog Devices]
Direct Link  http://www.analog.com
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AD8347ARUZ Datenblatt(HTML) 7 Page - Analog Devices

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AD8347
Rev. A | Page 7 of 28
Equiv.
Circuit
Pin No.
Mnemonic
Description
18, 20
VDT2, VDT1
D
Detector Inputs. These pins are the inputs to the on-board detector. VDT2 and VDT1, which have high
input impedances, are normally connected to IMXO and QMXO, respectively.
19
VAGC
I
AGC Output. This pin provides the output voltage from the on-board detector. In AGC mode, connect
this pin directly to VGIN.
21
VPS3
Positive Supply for Biasing and Baseband Sections. Decouple VPS3 with 0.1 μF and 100 pF capacitors.
24
QAIN
D
Q-Channel Baseband Amplifier Input. Bias this high input impedance pin to VREF (approximately 1 V).
If QAIN is directly connected to QMXO, biasing is provided by QMXO. If an ac-coupled filter is placed
between QMXO and QAIN, this pin can be biased from VREF through a 1 kΩ resistor. The gain from
QAIN to the QOPN/QOPP differential outputs is 30 dB.
25, 26
QOPP, QOPN
B
Q-Channel Differential Baseband Output. Typical output swing is equal to 760 mV p-p differential. The
common-mode level on these pins is programmed by the voltage on VCMO.
27
COM1
LO Section Ground.
RFIN
VREF
RFIP
VPS2
IMXO
COM3
IOPP
IOFS
IOPN
VCMO
VPS1
LOIN
IAIN
COM2
QOPN
COM3
VGIN
ENBL
LOIP
COM1
VPS3
AD8347
PHASE
SPLITTER
1
BIAS
CELL
DET 1
VREF
VREF
GAIN
CONTROL
INTERFACE
DET 2
VREF
VCMO
PHASE
SPLITTER
2
VCMO
VDT2
QMXO
QOPP
QOFS
VAGC
VDT1
QAIN
4
6
13
8
14
21
12
2
15
10
11
17
20
19
18
22
16
24
25
26
27
23
9
7
1
28
5
3
Figure 3. Block Diagram


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