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AD7482 Datenblatt(PDF) 5 Page - Analog Devices

Teilenummer AD7482
Bauteilbeschribung  3 MSPS, 12-Bit SAR ADC
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AD7482
Rev. B | Page 5 of 20
TIMING CHARACTERISTICS
AVDD/DVDD = 5 V ± 5%, AGND = DGND = 0 V, VREF = external; all specifications TMIN to TMAX and valid for VDRIVE = 2.7 V to 5.25 V,
unless otherwise noted.
Table 2.
Parameter1
Symbol
Min
Typ
Max
Unit
DATA READ
Conversion Time
tCONV
300
ns
Quiet Time Before Conversion Start
tQUIET
100
ns
CONVST
t1
Pulse width
5
100
ns
CONVST Falling Edge to
t2
BUSY Falling Edge
20
ns
CS Falling Edge to
t3
RD Falling Edge
0
ns
Data Access Time
t4
25
ns
CONVST
t5
Falling Edge to New Data Valid
30
ns
BUSY
t6
Rising Edge to New Data Valid
5
ns
Bus Relinquish Time
t7
10
ns
RD Rising Edge to
t8
CS Rising Edge
0
ns
CS
t14
Pulse width
30
ns
RD
t15
Pulse width
30
ns
DATA WRITE
WRITE Pulse Width
t9
5
ns
Data Setup Time
t10
2
ns
Data Hold Time
t11
6
ns
CS
t12
Falling Edge to WRITE Falling Edge
5
ns
WRITE Falling Edge to CS
t13
Rising Edge
0
ns
1
All timing specifications given are with a 25 pF load capacitance. With a load capacitance greater than this value, a digital buffer or latch must be used.


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