AD9742ARU datasheet(11/32 Pages) AD

Teilenummer	AD9742ARU

Bauteilbeschribung	12-Bit, 210 MSPS TxDAC Digital-to-Analog Converter

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Hersteller	AD [Analog Devices]

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11 / 32 page

Data Sheet

AD9742

Rev. C | Page 11 of 32

TERMINOLOGY

Linearity Error (Also Called Integral Nonlinearity or INL)

Linearity error is defined as the maximum deviation of the

actual analog output from the ideal output, determined by a

straight line drawn from zero to full scale.

Differential Nonlinearity (or DNL)

DNL is the measure of the variation in analog value, normalized

to full scale, associated with a 1 LSB change in digital input

code.

Monotonicity

A DAC is monotonic if the output either increases or remains

constant as the digital input increases.

Offset Error

The deviation of the output current from the ideal of zero is

called the offset error. For IOUTA, 0 mA output is expected

when the inputs are all 0s. For IOUTB, 0 mA output is expected

when all inputs are set to 1s.

Gain Error

The difference between the actual and ideal output span. The

actual span is determined by the output when all inputs are set

to 1s minus the output when all inputs are set to 0s.

Output Compliance Range

The range of allowable voltage at the output of a current output

DAC. Operation beyond the maximum compliance limits may

cause either output stage saturation or breakdown, resulting in

nonlinear performance.

Temperature Drift

Temperature drift is specified as the maximum change from the

ambient (25°C) value to the value at either TMIN or TMAX. For

offset and gain drift, the drift is reported in ppm of full-scale

range (FSR) per °C. For reference drift, the drift is reported in

ppm per °C.

Power Supply Rejection

The maximum change in the full-scale output as the supplies

are varied from nominal to minimum and maximum specified

voltages.

Settling Time

The time required for the output to reach and remain within a

specified error band about its final value, measured from the

start of the output transition.

Glitch Impulse

Asymmetrical switching times in a DAC give rise to undesired

output transients that are quantified by a glitch impulse. It is

specified as the net area of the glitch in pV-s.

Spurious-Free Dynamic Range

The difference, in dB, between the rms amplitude of the output

signal and the peak spurious signal over the specified

bandwidth.

Total Harmonic Distortion (THD)

THD is the ratio of the rms sum of the first six harmonic

components to the rms value of the measured input signal. It is

expressed as a percentage or in decibels (dB).

Multitone Power Ratio

The spurious-free dynamic range containing multiple carrier

tones of equal amplitude. It is measured as the difference

between the rms amplitude of a carrier tone to the peak

spurious signal in the region of a removed tone.

150pF

1.2V REF

AVDD

ACOM

REFLO

PMOS

CURRENT SOURCE

ARRAY

SEGMENTED SWITCHES

FOR DB11–DB3

LSB

SWITCHES

REFIO

FS ADJ

DVDD

DCOM

CLOCK

3.3V

RSET

2k

Ω

0.1

µF

DVDD

DCOM

IOUTA

IOUTB

AD9742

SLEEP

50

Ω

RETIMED

CLOCK

OUTPUT*

LATCHES

DIGITAL

DATA

TEKTRONIX AWG-2021

WITH OPTION 4

LECROY 9210

PULSE GENERATOR

CLOCK

OUTPUT

50

Ω

ROHDE & SCHWARZ

FSEA30

SPECTRUM

ANALYZER

MINI-CIRCUITS

T1-1T

*AWG2021 CLOCK RETIMED

SO THAT THE DIGITAL DATA

TRANSITIONS ON FALLING EDGE

OF 50% DUTY CYCLE CLOCK.

3.3V

MODE

50

Ω

Figure 22. Basic AC Characterization Test Set-Up (SOIC/TSSOP Packages)

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