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AD677JRZ Datenblatt(PDF) 3 Page - List of Unclassifed Manufacturers |
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AD677JRZ Datenblatt(HTML) 3 Page - List of Unclassifed Manufacturers |
3 / 12 page STANDARD MICROCIRCUIT DRAWING SIZE A 5962-95592 DLA LAND AND MARITIME COLUMBUS, OHIO 43218-3990 REVISION LEVEL B SHEET 3 DSCC FORM 2234 APR 97 1.3 Absolute maximum ratings. 1/ VCC to VEE .................................................................................................... -0.3 V dc to +26.4 V dc VDD to DGND ............................................................................................... -0.3 V dc to +7 V dc VCC to AGND ............................................................................................... -0.3 V dc to +18 V dc VEE to AGND ................................................................................................ -18 V dc to +0.3 V dc AGND to DGND ........................................................................................... ±0.3 V dc Digital inputs (CAL, SAMPLE, CLK) to DGND ............................................. 0 V dc to +5.5 V dc Analog inputs (VIN, VREF, AGND SENSE) to AGND ..................................... (VCC + 0.3 V) to (VEE – 0.3 V) Power dissipation (PD): VREF = 10 V .............................................................................................. 630 mW VREF = 5 V ................................................................................................ 530 mW Thermal resistance, junction-to-case ( θ JC) ................................................... 15 °C/W Thermal resistance, junction-to-ambient ( θ JA) .............................................. 80 °C/W Storage temperature range .......................................................................... -65 °C to +150°C Lead temperature (soldering, 10 sec) .......................................................... +300 °C 1.4 Recommended operating conditions. 2/ Ambient operating temperature range (TA) .................................................. -55°C to +125°C Positive analog supply voltage (VCC) ........................................................... 11.4 V dc to 12.6 V dc Negative analog supply voltage (VEE) .......................................................... -11.4 V dc to –12.6 V dc Digital supply voltage (VDD) ......................................................................... 4.5 V dc to 5.5 V dc Analog reference voltage (VREF) .................................................................. 5 V dc to 10 V dc Analog input voltage range (VIN) .................................................................. -VREF to VREF Analog ground sense voltage ...................................................................... -0.1 V dc to 0.1 V dc 2. APPLICABLE DOCUMENTS 2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those cited in the solicitation or contract. DEPARTMENT OF DEFENSE SPECIFICATION MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for. DEPARTMENT OF DEFENSE STANDARDS MIL-STD-883 - Test Method Standard Microcircuits. MIL-STD-1835 - Interface Standard Electronic Component Case Outlines. DEPARTMENT OF DEFENSE HANDBOOKS MIL-HDBK-103 - List of Standard Microcircuit Drawings. MIL-HDBK-780 - Standard Microcircuit Drawings. (Copies of these documents are available online at http://quicksearch.dla.mil or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094.) 2.2 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of this drawing takes precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained. ________ 1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the maximum levels may degrade performance and affect reliability. 2/ AGND and DGND tied at ADC. |
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