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AD7862ANZ-10 Datenblatt(PDF) 5 Page - Analog Devices |
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AD7862ANZ-10 Datenblatt(HTML) 5 Page - Analog Devices |
5 / 16 page AD7862 –5– REV. 0 PIN FUNCTION DESCRIPTION Pin Mnemonic Description 1 NC No Connect 2 DB11 Data Bit 11 (MSB). Three-state TTL output. Output coding is twos complement for the AD7862- 10 and AD7862-3. Output coding is straight (natural) binary for the AD7862-2. 3–6 DB10–DB7 Data Bit 10 to Data Bit 7. Three-state TTL outputs. 7 DGND Digital Ground. Ground reference for digital circuitry. 8 CONVST Convert Start Input. Logic Input. A high to low transition on this input puts both track/holds into their hold mode and starts conversion on both channels. 9–15 DB6–DB0 Data Bit 6 to Data Bit 0. Three-state TTL outputs. 16 AGND Analog Ground. Ground reference for mux, track/hold, reference and DAC circuitry. 17 VB2 Input Number 2 of Channel B. Analog Input voltage ranges of ±10 V (AD7862-10), ±2.5 V (AD7862-3) and 0 V–2.5 V (AD7862-2). 18 VA2 Input Number 2 of Channel A. Analog Input voltage ranges of ±10 V (AD7862-10), ±2.5 V (AD7862-3) and 0 V–2.5 V (AD7862-2). 19 VREF Reference Input/Output. This pin is connected to the internal reference through a series resistor and is the output reference source for the analog-to-digital converter. The nominal reference voltage is 2.5 V, and this appears at the pin. 20 A0 Multiplexer Select. This input is used in conjunction with RD and CS low to enable the data outputs. With A0 logic low, one read after a conversion will read the data from each of the ADCs in the sequence, VA1, VA2, and a subsequent read, when A0 goes high, reads the data from VB1, VB2. 21 CS Chip Select Input. Active low logic input. The device is selected when this input is active. 22 RD Read Input. Active low logic input. This input is used in conjunction with A0 and CS low to enable the data outputs. With A0 logic low, one read after a conversion will read the data from each of the ADCs in the sequence, VA1, VA2, and a subsequent read, when A0 goes high, reads the data from VB1, VB2. 23 BUSY Busy Output. The busy output is triggered high by the falling edge of CONVST and remains high until conversion is completed. 24 VDD Analog and Digital Positive Supply Voltage, +5.0 V ± 5%. 25 VA1 Input Number 1 of Channel A. Analog Input voltage ranges of ±10 V (AD7862-10), ±2.5 V (AD7862-3) and 0 V–2.5 V (AD7862-2). 26 VB1 Input Number 1 of Channel B. Analog Input voltage ranges of ±10 V (AD7862-10), ±2.5 V (AD7862-3) and 0 V–2.5 V (AD7862-2). 27 AGND Analog Ground. Ground reference for mux, track/hold, reference and DAC circuitry. 28 NC No Connect PIN CONFIGURATION 14 13 12 11 17 16 15 20 19 18 10 9 8 1 2 3 4 7 6 5 TOP VIEW (Not to Scale) 28 27 26 25 24 23 22 21 AD7862 NC = NO CONNECT NC VA1 VB1 AGND NC DB11 DB10 DB9 RD BUSY VDD DB8 DB7 DGND CONVST DB6 DB5 VREF A0 CS DB4 DB3 DB2 DB1 VA2 DB0 AGND VB2 |
Ähnliche Teilenummer - AD7862ANZ-10 |
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Ähnliche Beschreibung - AD7862ANZ-10 |
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