74LVC_LVCH244A

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Product data sheet

Rev. 8 — 26 June 2013

4 of 19

NXP Semiconductors

74LVC244A; 74LVCH244A

Octal buffer/line driver; 3-state

5.

Pinning information

5.1 Pinning

5.2 Pin description

(1) This is not a supply pin. The substrate is attached to this

pad using conductive die attach material. There is no

electrical or mechanical requirement to solder this pad.

However, if it is soldered, the solder land should remain

floating or be connected to GND.

Fig 4.

Pin configuration for SO20 and (T)SSOP20

Fig 5.

Pin configuration for DHVQFN20 and

DHXQFN20

74LVC244A

74LVCH244A

1OE

1A0

2OE

2Y0

1Y0

1A1

2A0

2Y1

1Y1

1A2

2A1

2Y2

1Y2

1A3

2A2

2Y3

1Y3

GND

2A3

001aad113

1

2

3

4

5

6

7

8

9

10

12

11

14

13

16

15

18

17

20

19

001aad114

74LVC244A

74LVCH244A

Transparent top view

9

12

8

13

7

14

6

15

5

16

4

17

3

18

2

19

terminal 1

index area

1A0

2Y0

1A1

2Y1

1A2

2Y2

1A3

2Y3

2OE

1Y0

2A0

1Y1

2A1

1Y2

2A2

1Y3

Table 2.

Pin description

Symbol

Pin

Description

1OE, 2OE

1, 19

output enable input (active low)

1A0, 1A1, 1A2, 1A3

2, 4, 6, 8

data input

2Y0, 2Y1, 2Y2, 2Y3

3, 5, 7, 9

data output

GND

10

ground (0 V)

2A0, 2A1, 2A2, 2A3

17, 15, 13, 11 data input

1Y0, 1Y1, 1Y2, 1Y3,

18, 16, 14, 12 data output

20

supply voltage