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AM79C983A Datenblatt(PDF) 1 Page - Advanced Micro Devices |
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AM79C983A Datenblatt(HTML) 1 Page - Advanced Micro Devices |
1 / 60 page PRELIMINARY This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice. Publication# 19879 Rev: B Amendment/0 Issue Date: April 1997 Am79C983A Integrated Multiport Repeater 2 (IMR2™) DISTINCTIVE CHARACTERISTICS n Repeater functionality compliant with IEEE 802.3 Repeater Unit specifications n Hardware implementation of Management Information Base (MIB) with all of the counters, attributes, actions, and notifications specified by IEEE 802.3 Section 19 (Layer Management) n Twelve pseudo AUI (PAUI™) ports to support multiple media types via direct connection to external transceivers n One IEEE-compliant AUI port n One reversible AUI (RAUI™) port that can be programmed as a second AUI port or used to connect directly to a media access controller (MAC) n Direct interface with the AMD Am79C988A QuIET™ (Quad Integrated Ethernet Transceiver) to support 10BASE-T repeater designs n Port switching support to allow individual ports to be switched between multiple Ethernet backplanes under software control n Remote Monitoring (RMON) Register Bank to provide direct support for etherStatsEntry and etherStatsHistory object groups of the RMON MIB (IETF RFC1757) n Packet Report Port to provide packet information for deriving objects in the Host, HostTopN, and Matrix groups of the RMON MIB (IETF RFC1578) n Two user-selectable expansion bus modes: IMR/IMR+ compatible mode and asynchronous mode n Simple 8-bit microprocessor interface n Full LED support n 132-pin PQFP CMOS device with a single 5-V supply GENERAL DESCRIPTION The Am79C983A Integrated Multiport Repeater 2 (IMR2) chip is a VLSI integrated circuit that provides a system-level solution to designing intelligent (man- aged) multiport repeaters. When the IMR2 device is combined with the Quad Integrated Ethernet Trans- ceiver (QuIET) device, it provides a cost-effective solution to designing 10BASE-T managed repeaters. The IMR2 device integrates the repeater functions specified by Section 9 ( Repeater Unit) and Section19 ( Layer Management for 10 Mb/s Baseband Repeaters) of the IEEE 802.3 standard. The Am79C983A IMR2 device provides 1 standard Attachment Unit Interface (AUI) port, 12 Pseudo Attachment Unit Interface (PAUI) por ts, and 1 Reversible AUI (RAUI) port for direct connection to a media access controller (MAC). The pseudo AUI ports can be connected to external transceivers to support multiple media types, including 10BASE2, 10BASE-T, and 10BASE-FL/FOIRL. The pseudo AUI ports can be turned off individually (without ex- ternal circuitry) to allow the switching of transceiver ports between IMR2 devices. This capability allows multiple IMR2 devices to be connected to a single set of transceivers, thus allowing straightforward implementations of port switching applications. The IMR2 device also provides a Hardware Imple- mented Management Information Base (HIMIB™), which is a super set of the functions provided by the Am79C987 HIMIB device. All of the necessar y counters, attributes, actions, and notifications speci- fied by Section 19 of the IEEE 802.3 standard are included in the IMR2 device. To facilitate the design of managed repeaters, the IMR2 device implements a simple 8-bit microprocessor interface. Support for an RMON MIB, as specified by the Internet Engineering Task Force (IETF) RFC 1757, is provided. Direct support is from an RMON Register Bank. Addi- tional support is provided by the Packet Report Port, which supplies information that can be used in conjunc- tion with a microprocessor to derive various RMON MIB attributes. With systems using multiple IMR2 de- |
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Ähnliche Beschreibung - AM79C983A |
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