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LM20134 Datenblatt(PDF) 11 Page - Texas Instruments

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Teilenummer LM20134
Bauteilbeschribung  LM20134/LM20134Q 4A, PowerWise Synchronous Buck Regulator with Input
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LM20134, LM20134Q
www.ti.com
SNVS527G – OCTOBER 2007 – REVISED MARCH 2013
OPERATION DESCRIPTION
GENERAL
The LM20134 switching regulator features all of the functions necessary to implement an efficient low voltage
buck regulator using a minimum number of external components. This easy to use regulator features two
integrated switches and is capable of supplying up to 4A of continuous output current. The regulator utilizes peak
current mode control with nonlinear slope compensation to optimize stability and transient response over the
entire output voltage range. Peak current mode control also provides inherent line feed-forward, cycle-by-cycle
current limiting and easy loop compensation. The internal oscillator can synchronize up to 1.5 MHz minimizing
the inductor size while still achieving efficiencies up to 96%. The precision internal voltage reference allows the
output to be set as low as 0.8V. Fault protection features include: current limiting, thermal shutdown, over voltage
protection, and shutdown capability. The device is available in the HTSSOP 16-pin package featuring an
exposed pad to aid thermal dissipation. The LM20134 can be used in numerous applications to efficiently step-
down from a 5V or 3.3V bus. The typical application circuit for the LM20134 is shown in Figure 28 in the design
guide.
PRECISION ENABLE
The enable (EN) pin allows the output of the device to be enabled or disabled with an external control signal.
This pin is a precision analog input that enables the device when the voltage exceeds 1.18V (typical). The EN pin
has 66 mV of hysteresis and will disable the output when the enable voltage falls below 1.11V (typical). If the EN
pin is not used, it should be connected to VIN. Since the enable pin has a precise turn on threshold it can be
used along with an external resistor divider network from VIN to configure the device to turn on at a precise input
voltage. The precision enable circuitry will remain active even when the device is disabled.
FREQUENCY SYNCHRONIZATION
The frequency synchronization pin (SYNC) allows the switching frequency of the device to be controlled with an
external clock signal. This feature allows the user to synchronize multiple converters, avoiding undesirable
frequency bands of operation. When used with the SYNCOUT of the LM20154, multiple devices can be
configured to switch out of phase reducing input capacitor requirements and EMI of the power supply system.
The turn on of the high-side switch will lock-on to the rising edge of the SYNC pin input. The logic low level for
the input clock must be below 0.8V and the logic high level must exceed 2.0V for proper operation. The device
will synchronize to frequencies from 500 kHz to 1.5 MHz. If the synchronization clock is removed or not present
during startup, the oscillator of the device will run at approximately 410 kHz. If the SYNC pin is not used it should
be connected to ground.
PEAK CURRENT MODE CONTROL
In most cases, the peak current mode control architecture used in the LM20134 only requires two external
components to achieve a stable design. The compensation can be selected to accommodate any capacitor type
or value. The external compensation also allows the user to set the crossover frequency and optimize the
transient performance of the device.
For duty cycles above 50% all current mode control buck converters require the addition of an artificial ramp to
avoid sub-harmonic oscillation. This artificial linear ramp is commonly referred to as slope compensation. What
makes the LM20134 unique is the amount of slope compensation will change depending on the output voltage.
When operating at high output voltages the device will have more slope compensation than when operating at
lower output voltages. This is accomplished in the LM20134 by using a non-linear parabolic ramp for the slope
compensation. The parabolic slope compensation of the LM20134 is much better than the traditional linear slope
compensation because it optimizes the stability of the device over the entire output voltage range.
Copyright © 2007–2013, Texas Instruments Incorporated
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