 |
Datenblatt-Suchmaschine für elektronische Bauteile |
|
|
Datenblatt-Suchmaschine für elektronische Bauteile |
|
KMPC8315CVRAGDA Datenblatt(PDF) 7 Page - Freescale Semiconductor, Inc |
|
||||||||||||||||||||||||||||||
KMPC8315CVRAGDA Datenblatt(HTML) 7 Page - Freescale Semiconductor, Inc |
|
|
7 / 106 page  MPC8315E PowerQUICC II Pro Processor Hardware Specifications, Rev. 2 Freescale Semiconductor 7 MPC8315E Features 2.12 Power Management Controller (PMC) The MPC8315E supports a range of power management states that significantly lower power consumption under the control of the power management controller. The PMC includes the following features: • Provides power management when the device is used in both PCI host and agent modes • PCI Power Management 1.2 D0, D1, D2, D3hot, and D3cold states • PME generation in PCI agent mode, PME detection in PCI host mode • Wake-up from Ethernet (magic packet), USB, GPIO, and PCI (PME input as host) while in the D1, D2 and D3hot states • A new low-power standby power management state called D3warm — The PMC, one Ethernet port, and the GTM block remain powered via a split power supply controlled through an external power switch — Wake-up events include Ethernet (magic packet), GTM, GPIO, or IRQ inputs and cause the device to transition back to normal operation — PCI agent mode is not be supported in D3warm state • PCI Express-based PME events are not supported 2.13 Serial Peripheral Interface (SPI) The serial peripheral interface (SPI) allows the MPC8315E to exchange data between other PowerQUICC family chips, Ethernet PHYs for configuration, and peripheral devices such as EEPROMs, real-time clocks, A/D converters, and ISDN devices. The SPI is a full-duplex, synchronous, character-oriented channel that supports a four-wire interface (receive, transmit, clock, and slave select). The SPI block consists of transmitter and receiver sections, an independent baud-rate generator, and a control unit. 2.14 DMA Controller, I2C, DUART, Enhanced Local Bus Controller (eLBC), and Timers The integrated four-channel DMA controller includes the following features: • Allows chaining (both extended and direct) through local memory-mapped chain descriptors (accessible by local masters) • Misaligned transfer capability for source/destination address • Supports external DREQ, DACK and DONE signals There is one I2C controller. This synchronous, multi-master buses can be connected to additional devices for expansion and system development. The DUART supports full-duplex operation and is compatible with the PC16450 and PC16550 programming models. 16-byte FIFOs are supported for both the transmitter and the receiver. The eLBC port allows connections with a wide variety of external DSPs and ASICs. Three separate state machines share the same external pins and can be programmed separately to access different types of devices. The general-purpose chip select machine (GPCM) controls accesses to asynchronous devices |
Ähnliche Teilenummer - KMPC8315CVRAGDA |
|
Ähnliche Beschreibung - KMPC8315CVRAGDA |
|
|
Link URL |
| Privatsphäre und Datenschutz |
| ALLDATASHEETDE.COM |
| War ALLDATASHEET hilfreich? [ DONATE ] |
Über Alldatasheet | Werbung | Kontakt | Privatsphäre und Datenschutz | Linktausch | Hersteller All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
German ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
