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ST3L01K7R Datenblatt(PDF) 4 Page - STMicroelectronics

Teilenummer ST3L01K7R
Bauteilbeschribung  TRIPLE VOLTAGE REGULATOR
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST3L01K7R Datenblatt(HTML) 4 Page - STMicroelectronics

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Note 1: Low duty cycle pulse testing with Kelvin connections are required in order to maintain accurate data
Note 2: Dropout Voltage is defined as the minimum differential voltage between VI and VO required to mantain regulation at VO. It is measured
when the output voltage drops 100mV below its nominal value.
Note 3: Transient response is defined with a step change in load from 10mA to IFL/2 as the time from the load step until the output voltage
reaches it’s minimum value.
Note 4: Minimum load current is defined as the minimum current required at the output in order to maintain regulation for the output voltage.
Note 5: The regulator shall withstand 100000 reverse bias discharges of the maximum output capacitance, with no degradation, when the
input voltage is switched to ground in 1
µs.
Note 6: Temperature stability is the change in output from nominal over the operating temperature range.
Note 7: Guaranteed by design, not tested in production.
APPLICATION HINTS
EXTERNAL CAPACITORS
The ST3L01 requires external capacitors for
stability. We suggest to solder both capacitors as
close as possible to the relative pins.
INPUT CAPACITORS
An input capacitor, whose value is at least 0.1
µF,
is required on the VDD input; the amount of the
input capacitance can be increased without limit.
Any good quality tantalum or ceramic low ESR
capacitor may be used at the VDD input.
Any input capacitor, whose value is at least 1mF is
instead required on the VCC input; the amount of
this input capacitance can be increased without
limit. Tantalum or aluminum electrolitic capacitor
can be used at the VCC input; ceramic, low ESR
capacitor are not recommended.
Both capacitors must be located at a distance of
not modre than 0.5" from the input pins of the
device and returned to a clean analog ground.
OUTPUT CAPACITOR
The ST3L01 is designed specifically to work with
Ceramic and Tantalum capacitors.
The test results of the ST3L01 stability using
multilayer
ceramic
capacitors
show
that
a
minimum value of 0.1
µF is needed for the three
regulators. This value can be increased for even
better transient response and noise performance.
Surface-mountable solid tantalum capacitors offer
a good combination of small physical size for the
capacitance value and ESR in the range need by
the ST3L01. The test results show good stability
for both outputs with values of at least 0.1
µF. Also
this capacitor value can be increased without limit
for even better performance such a transient
response and noise.
IMPORTANT; The output capacitor must maintain
its ESR in the stable region over the full operating
temperature to assure stability. Also , capacitor
tolerance and variation with temperature must be
considered to assure that the minimum amount of
capacitance is provided at all times. For this
reason, when a caramic multilayer capacitor is
used, the better choise for temperature coefficent
is the X7R type, which holds the capacitance
within
±15% . The output capacitor should be
located not more than 0.5" from the output pins of
the device and returned to a clean analog ground.
CO
Output Capacitor
(Note 5, 7)
0.1
µF
CCC
Input Capacitor
(Note 5)
1.0
µF
CDD
Input Capacitor
(Note 5)
0.1
µF
RegTherm Therma Regulation
IOUT = IFL,
tPULSE = 30ms
(Note 7)
0.1
0.3
%/W
SVR1
Supply Voltage Rejection
(VCC to Output 1)
B = 100Hz to 100KHz
IO1 = IFL1/10
VCC = 4.75 to 5.25V
(Note 7)
30
>40
dB
SVR2
Supply Voltage Rejection
(VCC to Output 2)
B = 100Hz to 100KHz
IO2 = IFL2/10
VCC = 4.75 to 5.25V
(Note 7)
30
>40
dB
SVR3
Supply Voltage Rejection
(VDD to Output 3)
B = 100Hz to 100KHz
IO3 = IFL3/10
VDD = 10.8 to 13.2V
(Note 7)
40
>50
dB
IVCC
VCC Quiescent Current
IO1 = IO2 = IO3 = 0
7
10
mA
IVDD
VDD Quiescent Current
IO1 = IO2 = IO3 = 0
13
20
mA
eN
Output Noise
B = 10Hz to 10KHz
(Note 7)
0.003
%VOUT
∆V
O
Temperature Stability
IO = 10mA (Note 6, 7)
0.5
%VOUT
∆V
O
Long Term Stability
Tj = 125°C, 1000Hrs (Note 7)
0.3
%VOUT
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit


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