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ADS8861IDGSR Datenblatt(PDF) 7 Page - Texas Instruments |
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ADS8861IDGSR Datenblatt(HTML) 7 Page - Texas Instruments |
7 / 49 page 1 2 15 16 CONVST SCLK DOUT 2 tsu-CK-CNV 17 18 31 32 D15 D15 D1 D0 D15 D14 D1 D0 DOUT 1, DIN 2 D15 D14 D1 D0 1/fsample tACQ tconv- max th-CK-CNV Device 2 Data Device 1 Data DIN 1 = LOW tsu-DI-CK ADS8861 www.ti.com SBAS557A – MAY 2013 – REVISED DECEMBER 2013 DAISY-CHAIN OPERATION Figure 3. Daisy-Chain Operation: Two Devices NOTE Figure 3 shows the timing diagram for the Daisy-Chain Mode Without a Busy Indicator interface option. However, the timing parameters specified in Table 3 are also applicable for the Daisy-Chain Mode With a Busy Indicator interface option, unless otherwise specified. Refer to the Digital Interface section for specific details for each interface option. Table 3. TIMING REQUIREMENTS: Daisy-Chain(1) PARAMETER MIN TYP MAX UNIT tACQ Acquisition time 290 ns tconv Conversion time 500 710 ns 1/fsample Time between conversions 1000 ns tsu-CK-CNV Setup time: SCLK valid to CONVST rising edge 5 ns th-CK-CNV Hold time: SCLK valid from CONVST rising edge 5 ns tsu-DI-CNV Setup time: DIN low to CONVST rising edge (see ) 7.5 ns th-DI-CNV Hold time: DIN low from CONVST rising edge (see Figure 63) 0 ns tsu-DI-CK Setup time: DIN valid to SCLK falling edge 1.5 ns (1) All specifications are at TA = –40°C to +85°C, AVDD = 3 V, and DVDD = 3 V, unless otherwise noted. Copyright © 2013, Texas Instruments Incorporated Submit Documentation Feedback 7 Product Folder Links: ADS8861 |
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