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ADC08DL500CIVV Datenblatt(PDF) 10 Page - Texas Instruments |
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ADC08DL500CIVV Datenblatt(HTML) 10 Page - Texas Instruments |
10 / 57 page ADC08DL500 SNAS495C – MARCH 2011 – REVISED MARCH 2011 www.ti.com Operating Ratings (1) (2) (continued) Ambient Temperature Range (3) −40°C ≤ TA ≤ +70°C Supply Voltage (VA) +1.8V to +2.0V Driver Supply Voltage (VDR) +1.8V to VA Common Mode Input Voltage VCMO ± 50 mV VIN+, VIN− Voltage Range (Maintaining Common Mode) 0V to 2.15V (100% duty cycle) 0V to 2.5V (10% duty cycle) Ground Difference (|GND − DR GND|) 0V CLK Pins Voltage Range 0V to VA Differential CLK Amplitude 0.4VP-P to 2.0VP-P Common Mode Input Voltage VCMO - 50mV < VCMI < VCMO + 50mV (3) The 4-layer standard JEDEC thermal test board or 4LJEDEC is 4"x3" in size. The board has two embedded copper layers which cover roughly the same size as the board. The copper thickness for the four layers, starting from the top one, is 2 oz., 1 oz., 1 oz., 2 oz. Detailed description of the board can be found in the JESD 51-7 standard. Package Thermal Resistance (1) (2) Package θJA θJC psiJB 144-Lead, 43.6°C / W 12.5°C / W 39.0°C / W LQFP (1) Soldering process must comply with National Semiconductor’s Reflow Temperature Profile specifications. Refer to www.national.com/packaging. (2) Reflow temperature profiles are different for lead-free and non-lead-free packages. 10 Submit Documentation Feedback Copyright © 2011, Texas Instruments Incorporated Product Folder Links: ADC08DL500 |
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