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STPMS1 Datenblatt(PDF) 7 Page - STMicroelectronics

Teilenummer STPMS1
Bauteilbeschribung  Dual-channel 1-bit, 2 MHz, 1st order Dual-channel 1-bit, 2 MHz, 1st order
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Hersteller  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

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STPMS1
General operating conditions
Doc ID 16524 Rev 2
7/23
Symbol
Parameter
Test conditions
Min.
Typ.
Max.
Unit
AC measurement accuracy
SNR
Signal to noise ratio
CIP-CIN channel – Vin=±120 mV @ 55 Hz
Gain 8x
65
dB
VIP-VIN channel – Vin=±230 mV @ 55 Hz
50
SINAD
Signal to noise ratio +
distortion
CIP-CIN channel – Vin=±120 mV @ 55 Hz
Gain 8x
65
dB
VIP-VIN channel – Vin=±230 mV @ 55 Hz
50
THD
Total harmonic distortion
CIP-CIN channel – Vin=±120 mV @ 55 Hz
Gain 8x
-80
dB
VIP-VIN channel – Vin=±230 mV @ 55 Hz
-70
SFDR
Spurious free dynamic
range
CIP-CIN channel – Vin=±120 mV @ 55 Hz
Gain 8x
80
dB
VIP-VIN channel – Vin=±230 mV @ 55 Hz
50
PSRRAC
Power supply AC
rejection
Voltage signal: 200 mVrms/50 Hz
Current signal: 10 mVrms/50 Hz
fCLK= 2.048 MHz
VCC=3.3 V+0.2 Vrms1 @100 Hz
VCC=5.0 V+0.2 Vrms1 @100 Hz
0.1
%
Analog inputs (CIP, CIN, VIP, VIN)
VMAX
Maximum input signal
levels
VIP-VIN channel
-0.3
+0.3
V
CIP-CIN channel
Gain 8X
Gain 32X
-0.15
-0.035
+0.15
+0.035
V
fSPL
A/D sampling frequency
fCLK/2
Hz
Voff
Amplifier offset
±20
mV
ZIP
VIP, VIN impedance
Over the total operating voltage range
200
400
k
Ω
ZIN
CIP, CIN impedance
Over the total operating voltage range
240
k
Ω
GERR
Current channel gain
error
±10
%
IILV
Voltage channel leakage
current
VCC= 5.3 V, fCLK= 1.049 MHz
-1
1
µA
IILI
Current channel leakage
current
-1
1
Input enabled
-10
10
Digital I/O (CLK, DAT, DATn, MS0, MS1)
VIH
Input high voltage
0.75
VCC
5.3
V
VIL
Input low voltage
-0.3
0.25V
CC
V
Table 5.
General operating conditions (continued)


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