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CD22301E Datenblatt(PDF) 3 Page - Intersil Corporation

Teilenummer CD22301E
Bauteilbeschribung  Monolithic PCM Repeater
Download  6 Pages
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Hersteller  INTERSIL [Intersil Corporation]
Direct Link  http://www.intersil.com/cda/home
Logo INTERSIL - Intersil Corporation

CD22301E Datenblatt(HTML) 3 Page - Intersil Corporation

  CD22301E Datasheet HTML 1Page - Intersil Corporation CD22301E Datasheet HTML 2Page - Intersil Corporation CD22301E Datasheet HTML 3Page - Intersil Corporation CD22301E Datasheet HTML 4Page - Intersil Corporation CD22301E Datasheet HTML 5Page - Intersil Corporation CD22301E Datasheet HTML 6Page - Intersil Corporation  
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4-233
CD22301
Output Pulse Fall Time
tF
4, 8
9, 10
-
-
40
ns
Output Pulse Width
tW
4, 8
9, 10
290
324
340
ns
Pulse Width Differential
∆t
W
4, 8
9, 10
-10
0
10
ns
Clock Drive Current
ICL
-2-
mA
NOTES:
1. No signal input. Measure voltage between pins 7 and 8.
2. Measure clock limiter input impedance at pin 15. See Figure 5.
3. Adjust potentiometer for 0V (See Figure 5). Measure ALBO off impedances from pins 2, 3 and 4 to pin 1.
4. Increase potentiometer until voltage at pin 17 = 2V (See Figure 5). Measure ALBO on impedances from pins 2, 3 and 4 to pin 1.
5. Adjust potentiometer for
∆V = 0V (See Figure 6). Then slowly increase ∆V in the positive direction until pulses are observed at the DATA
terminal.
6. Continue increasing
∆V until the DC level at the clock terminal drops to 4V (See Figure 6).
7. Continue increasing
∆V until the ALBO terminal rises to 1V (See Figure 6).
8. Turn potentiometer in the opposite direction and measure negative threshold voltages by repeating tests outlined in notes 5, 6 and 7.
9. Set eIN = 2.75mVRMS at f 1.185MHz. Adjust frequency until maximum amplitude is obtained at pin 15. Observe output pulses at pins
10 and 11.
10. Adjust input signal amplitude until pulses just appear in outputs. Increase input amplitude by 3dB.
Electrical Specifications
TA = 25
oC, V
CC = 5.1V ±5% (Continued)
PARAMETER
SYMBOL
FIGURE
NOTE
MIN
TYP
MAX
UNITS
9
8
7
6
5
3
2
4
1
18
17
16
15
14
11
10
12
13
FF
FF
TIMING
PULSE
AMPLIFIER
LIMITER
CLOCK
CIRCUIT
SEE FIG. 2
ALBO
OUTPUT
CIRCUIT
SEE
FIG. 1
GATE
GATE
AO1
AO2
AO3
PULSE
INPUT
430
1.8K
8.2K
2.7K
470
µH
2200pF
510
82pF
0.1
µF
0.1
µF
4.53K
1.33K
150pF
6.19K
15
µH
1500pF
0.1
µF
ALBO
GND
SUBSTRATE
ALBO
BIAS
1
µF
+
PEAK
DETECTOR
CLOCK THRESHOLD
COMPARATOR
DATA THRESHOLD
COMPARATOR
17
µH
0.1
µF
600 - 800pF
120K
BIAS
LC TANK
INPUT
VCC
VEE
VCC
100
µH
PULSE
OUTPUT
PHASE
SHIFT
NETWORK
3.83K
33pF
PRE-
AMPLIFIER
130
FIGURE 1. TYPICAL 1.544MHz T1 REPEATER SYSTEM


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