SM3G5 Data Sheet #:

TM083

Page 9 of 36 Rev: 05 Date: 01/26/11

© Copyright 2011 The Connor-Winfield Corp. All Rights Reserved

Specifications subject to change without notice

Reference Input Quality Monitoring

Eachreferenceinputismonitoredforsignalpresenceandfrequencyoffset.Signalpresenceforthe

Ref1-4inputsisindicatedin

the

Ref_ActivityregisterandsignalpresencefortheM/S REFisindicatedinbit0oftheM/S REF_Activityregister.Thefrequency

offsetbetweenthe

Ref1-4inputsandthecalibratedlocaloscillatorisavailableintheRef_Frq_Offsetregisters(4).RegisterRef_

Pullin_Stsindicates,foreachoftheRef1-4inputs,ifthereferenceiswithinthemaximumpull-inrange.Themaximumpull-inrange

isindicatedinregister

Max_Pullin_Range,andmaybesetin0.1ppmincrements.Typically,itwouldbesetaccordingtothevalues

specifiedbythestandards(GR-1244)appropriatefortheparticularstratumofoperation.

The

Ref_Qualifiedregistercontainsthe“anded”conditionoftheRef_ActivityandRef_Pullin_StsregistersforeachoftheRef1-4

inputs,qualifiedfor10seconds.Whenareferencesignalhasbeenpresentfor>10secondsandiswithinthepull-inrange,it’sbitis

set.

The

Ref_Availableregistercontainsthe“anded”conditionoftheRef_QualifiedregisterandtheRef_Maskregister,andtherefore

representstheavailabilityofareferenceforselectionwhenautomaticreferenceandoperationalmodeselectionisenabled.

Reference Input Selection, Frequencies, and Mode Selection

Oneoffourreferenceinputsignals(

Ref 1-4)areselectedforsynchronizationinMastermode(asbelowintheOp_Moderegister

description.0x05).

Ref1-4mayeachbe8kHz,1.544MHz,2.048MHz,12.96MHz,19.44MHz,25.92MHz,38.88MHz,51.84MHz

or77.76MHz.

Referencefrequenciesareauto-detected(frequencydeterminedbythechip)andthedetectedfrequencycanbereadfromthe

Ref_Frq_Priority registers(SeeRegister Descriptions and Operationsection).

TheM/SREFinputforslaveoperationisfrequencyauto-detectedandmaybe8kHz,1.544MHz,2.048MHz,12.96MHz,19.44MHz,

25.92MHz,38.88MHz,51.84MHzor77.76MHz.SignalpresenceandfrequencyfortheM/SREFinputisindicatedinbits0-3ofthe

M/S REF_Activityregister.

Activereferenceandoperationalmodeselectionmaybemanualorautomatic,asdeterminedbybit1intheCtl_Moderegister.In

manualmode,registerwritestoOp_Modeselectthereferenceandmode.Theresetdefaultismanualmode.

Inautomaticmode,thereferenceisselectedaccordingtotheprioritieswrittentothefour

Ref_Frq_Priorityregisters.Individual

referencesmaybemaskedforuse/non-useaccordingtothe

Ref_Maskregister.Areferencemayonlybeselectedifitis“available”

-thatis,itisqualified,asindicatedinthe

Ref_Qualified register,andisnotmasked(SeeReference Input Quality Monitoring and

Register Descriptions and Operation sections).

Furthermore,Bit3ofeach

Ref_Frq_Priority registerwilldetermineifthatreferenceisrevertiveornon-revertive.Whenareference

fails,thenexthighestpriority“available”(signalpresent,non-masked,andacceptablefrequencyoffset)referencewillbeselected.

Whenareferencereturns,itwillbeswitchedtoonlyifitisofhigherpriorityandthecurrentactivereferenceismarked“Revertive”.

Additionally,thereversionisdelayedaccordingtothevaluewrittentothe

Ref_Rev_Delayregister(From0to255minutes).

Detailed Description continued

Serial Interface Timing

Table 4

Symbol

Parameter

Minimum

Nominal

Maximum

Units

Notes

t

SPI_EnablelowtoSPI_CLKlow

15

-

-

ns

t

SPI_CLKhightime

25

-

-

ns

t

SPI_CLKlowtime

25

-

-

ns

t

Read/Writesetuptime

15

-

-

ns

t

Read/Writeholdtime

15

-

-

ns

t

Dataready

-

-

25

ns

t

DataHold

15

-

-

ns

t

ChipSelecttodatatri-state

5

-

-

ns

t

Minimumdelaybetweensuccessiveaccesses 300

-

-

ns

Note:TheSPIportshouldnotbeaccesseduntil1200msafterresethastransitionedfromlowtoahighstate.