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ISL28023FR12Z Datenblatt(PDF) 11 Page - Intersil Corporation |
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ISL28023FR12Z Datenblatt(HTML) 11 Page - Intersil Corporation |
11 / 55 page ISL28023 11 FN8389.4 June 17, 2015 Submit Document Feedback Only ADC in Idle Mode All other blocks are disabled 640 705 µA Only Threshold Detectors All three detectors are active 760 945 µA Only Margin DAC All other blocks are disabled 240 286 µA Fully Enabled Chip Current All functional blocks enabled 1240 1545 µA Fully Disabled Chip Current All functional blocks disabled 5 15 µA Ivreg_in Voltage Regulator Vreg_in = 4.5V to 60V; Rload = open 26 35 µA Ii2cvcc I2C Supply Current SMBCLK = 100kHz; I2CVCC = 3.3V 15 µA Ii2cvcc_pd I2C Idle supply current Input signals are static 100 nA NOTE: 6. Parameters with MIN and/or MAX limits are 100% tested at +25°C, unless otherwise specified. Compliance to datasheet limits is assured by one or more of the following methods: production test, characterization and design. Electrical Specifications TA=+25°C,I2CVCC=VCC=3.3V,VINP=VBUS=12V,VSENSE=VINP-VINM=80mV,AUXP-AUXM=80mV,AuxV = 3V, Conversion Time: Aux = Primary = 2.05ms, Internal AVG Aux = Primary = 128, unless otherwise specified. All voltages with respect to GND pin. (Continued) PARAMETER DESCRIPTION TEST CONDITIONS MIN (Note 6)TYP MAX (Note 6)UNIT |
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Ähnliche Beschreibung - ISL28023FR12Z |
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