Datenblatt-Suchmaschine für elektronische Bauteile |
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ISL59482IRZ Datenblatt(PDF) 11 Page - Intersil Corporation |
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ISL59482IRZ Datenblatt(HTML) 11 Page - Intersil Corporation |
11 / 15 page ISL59482 11 FN6209.4 August 8, 2014 Submit Document Feedback Figure 27A illustrates the optimum output load for testing AC performance. Figure 27B illustrates the optimum output load when connecting to a 50Ω input terminated equipment. Application Information General The ISL59482 is ideal as the matrix element of high performance switchers and routers. Key features include internal fixed gain of 2, high impedance buffered analog inputs and excellent AC performance at output loads down to 150Ω for video cable-driving. The current feedback output amplifiers are stable operating into capacitive loads. Ground Connections For the best isolation and crosstalk rejection, all GND pins must connect to the GND plane. Power-up Considerations The ESD protection circuits use internal diodes from all pins the V+ and V- supplies. In addition, a dV/dT- triggered clamp is connected between the V+ and V- pins, as shown in the Equivalent Circuits 1 through 4 section of the “Pin Description” on page 3. The dV/dT triggered clamp imposes a maximum supply turn-on slew rate of 1V/µs. Damaging currents can flow for power supply rates-of-rise in excess of 1V/µs, such as during hot plugging. Under these conditions, additional methods should be employed to ensure the rate of rise is not exceeded. Consideration must be given to the order in which power is applied to the V+ and V- pins, as well as analog and logic input pins. Schottky diodes (Motorola MBR0550T or equivalent) connected from V+ to ground and V- to ground (Figure 28) will shunt damaging currents away from the internal V+ and V- ESD diodes in the event that the V+ supply is applied to the device before the V- supply. One Schottky can be used to protect both V+ power supply pins, and a second for the protection of both V- pins. If positive voltages are applied to the logic or analog video input pins before V+ is applied, current will flow through the internal ESD diodes to the V+ pin. The presence of large decoupling capacitors and the loading effect of other circuits connected to V+, can result in damaging currents through the ESD diodes and other active circuits within the device. Therefore, adequate current limiting on the digital and analog inputs is needed to prevent damage during the time the voltages on these inputs are more positive than V+. HIZ State Each internal 4:1 triple MUX-amp has a three-state output control pin (HIZ1 and HIZ2). Each has a an internal pull-down resistor to set the output to the enabled state with no connection to the HIZ pin. The HIZ state is established within approximately 20ns by placing a logic high (>2V) on the HIZ pin. If the HIZ state is selected, the output is a high impedance 1.4MΩ with approximately 1.5pF in parallel with a 10µA bias current from the output. When more than one MUX shares a common output, the high impedance state loading effect is minimized over the maximum output voltage swing and maintains its high Z even in the presence of high slew rates. The supply current during this state is the same as the active state. EN and Power-down States The EN pins are active low. An internal pull-down resistor ensures the device will be active with no connection to the EN pins. The Power-down state is established within approximately 80ns, if a logic high (>2V) is placed on the EN pins. In the Power-down state, supply current is reduced significantly by shutting the three amplifiers off. The output presents a high impedance to the output pin, however, there is a risk that the disabled amplifier output can be back-driven at signal voltage levels exceeding 2VP-P. Under this condition, large incoming slew rates can cause fault currents of tens of mA. Therefore, the parallel connection of multiple outputs is not recommended unless the application can tolerate the limited power-down output impedance. Limiting the Output Current No output short circuit current limit exists on these parts. All applications need to limit the output current to less than 50mA. Adequate thermal heat sinking of the parts is also required. FIGURE 27C. BACKLOADED TEST CIRCUIT FOR VIDEO CABLE APPLICATION. BANDWIDTH AND LINEARITY FOR RL LESS THAN 500Ω WILL BE DEGRADED. FIGURE 27. TEST CIRCUITS AC Test Circuits (Continued) ISL59482 RS CL VIN 50Ω or 75Ω TEST 5pF 50Ω or 75Ω 50Ω or 75Ω EQUIPMENT |
Ähnliche Teilenummer - ISL59482IRZ |
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Ähnliche Beschreibung - ISL59482IRZ |
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